Table of Contents
0. Foreword..................................................................................................................... 2
1. Introduction.................................................................................................................. 6
1.1 Circuit Analysis....................................................................................................... 6
1.2 Describing Circuits.................................................................................................. 6
2. Network Topology....................................................................................................... 8
2.1 Terminals................................................................................................................. 8
2.2 Links and Currents................................................................................................... 8
2.3 Nodes and Voltages................................................................................................. 9
2.4 Devices.................................................................................................................... 9
2.5 A Network Topology............................................................................................... 9
2.6 Semidevices and Ports............................................................................................. 9
3. Descriptive Remarks................................................................................................. 11
4. Some Important Devices and Some Examples........................................................... 15
4.1 One Terminal Devices........................................................................................... 15
4.2 Two Terminal Devices.......................................................................................... 15
4.2.1 The Current Source........................................................................................ 15
4.2.2 The Voltage Source........................................................................................ 17
4.2.3 The Resistor................................................................................................... 19
4.2.4 The Diode...................................................................................................... 21
4.2.5 The Inductor and the Capacitor...................................................................... 24
4.3 Three Terminal Devices........................................................................................ 26
4.3.1 The Silicon Bipolar Transistor...................................................................... 26
4.3.2 The MOSFET................................................................................................ 34
5. Composite Devices.................................................................................................... 37
6. Numbers of Equations and Independence of
Equations.............................................. 41
6.1 The Essentials........................................................................................................ 41
6.2 Topology................................................................................................................ 42
6.2.1 Summary........................................................................................................ 42
6.2.2 Independence of the Current Balance
Equations............................................ 42
6.2.3 Equation Counting.......................................................................................... 45
6.3 Devices.................................................................................................................. 47
6.3.1 Summary........................................................................................................ 56
7. A Circuit Analysis Program....................................................................................... 57
7.1 Description............................................................................................................ 57
7.2 Example................................................................................................................. 60
8. Estimating.................................................................................................................. 66
0. Foreword
I wrote this presentation of circuit analysis at the University of California, Riverside in 1972. I scanned it, reedited it, and filled it out more in 1998 and 1999.
This presentation was written and used to teach circuit analysis very quickly in a course on processor design for computer science students. The students began with no background in electronics or circuits at all. They did have significant programming ability, and were relatively sophisticated in mathematics. The circuits unit was to bring these students to a level of sophistication in circuits so that they would be capable of doing a DC analysis of a TTL or ECL gate circuit, with a number of transistors and diodes and any applied input voltage, by hand. Therefore they would be able to produce the Z shaped transfer function of such a gate by hand. They would also be able to analyze a 2 transistor flip flop by hand and to show that it can be in 3 different states.
Perhaps more importantly, the students wrote a circuit analysis program that could do DC analysis on quite complex circuits containing voltage sources, current sources, resistors, diodes, and transistors. This program could analyze significant circuits with many states including many self-sustaining states. Writing this program was an exercise in writing a complex application program. It was also proof that the students understood circuit analysis. If you can write a program to do it, you know how to do it.
Besides circuits, it was a goal that the students leave with a keen understanding of where circuit states come from at the lowest level of circuits, how these states become logic levels and how they become self sustaining states in latches and flip flops – memory devices.
This circuits unit was just a part of the course. This course went on to examine how important logic families worked at the circuit level, and to combinational logic design, design of registers, muxes, adders and other important structures, sequential logic design, and design of entire processors with emphasis on the control logic.
The actual instruction in circuits took place in about 3 to 4 weeks. The project, writing a circuit analysis program, took quite a few more weeks outside of class. Meanwhile the class moved on.
The challenge was how to bring a class from 0 to considerable sophistication with circuit analysis, including a solid understanding of some complex circuit devices, in 3 or 4 weeks, about 10 classroom hours. The advantage that I had was that the students started out fairly sophisticated in mathematics and programming.
In the 3 or 4 weeks of instruction we did not cover all of the material in this paper. We were very brief on composite devices in section 5. We did not touch section 6 at all. Indeed I make the point in section 6 that although this material may be interesting to some people, it is not actually required for almost anything you might want to do.
I learned circuit analysis at the University of Wisconsin in 1964 to 1965. I was taught several different complex and arcane methods for writing the equations for a circuit (e.g., loop equations, cut-set equations). These involved extracting the graph of the circuit, constructing the tree, etc. I was taught from notes, “Elementary Topology and Network Equilibrium Equations” written at the University of Wisconsin. I have provided a copy of these notes together with this paper in my postings of this paper. It should be very interesting indeed to compare the approach in “Elementary Topology and Network Equilibrium Equations” with the approach in this paper. “Elementary Topology and Network Equilibrium Equations” is the conventional way to write circuit equations. The only other known choice at the time was to write random loop equations. With random loop equations, there is no effective procedure for getting a complete set of equations. That is why there was this arcane thing with trees and so forth.
The conventional way to write circuit equations was entirely too complex. I was also convinced that it was needlessly complex. If I had to teach it this way, I would never be able to teach what I wanted in circuits in 3 to 4 weeks. It was also much, much too complex to write a circuit analysis program with this conventional approach. Students would have little chance of success with their projects of writing a quite sophisticated circuit analysis program if they were taught the conventional approach to writing circuit equations and told to go with it. I also believed that the conventional approach was conceptually opaque. Students would not get what is really going on in circuits in a few weeks if they had to see circuits from the conventional vantage point.
I therefore developed the approach of this paper. To my knowledge, no one else has presented circuit analysis this way. There is no new science in this presentation. Everything here is well known. But as far as I know, it is a completely new presentation and method of writing the circuit equations.
I believe this paper is a superior presentation of circuit analysis compared to the conventional approach, which is exemplified in “Elementary Topology and Network Equilibrium Equations”. This is not picking on these notes in particular. These notes are very representative of the conventional approach to writing circuit equations. They did a good job of presenting this conventional approach. You will see exactly the same thing in an endless string of textbooks on circuit analysis.
In the conventional approach you never quite know if a resistor is some special thing that is intrinsic to circuit analysis itself, or if it is a device. Is Ohm’s law fundamental to circuit analysis, or is it a device characteristic? The approach of this paper makes it very, very clear what a device is. No devices are special. You can use any devices you want. A resistor is a device just like any other device. Ohm’s law is a device characteristic. It is neither more nor less fundamental than any other device characteristic.
The conventional approach is entirely built around 2 terminal devices. There really is no provision in the circuit analysis itself for anything but 2 terminal devices. This follows directly from the conventional approach of having currents flowing through devices. If a current flows through a device, it is very hard to have that device be anything but 2 terminals. 3 terminal devices, like transistors, must be modeled in terms of 2 terminal devices. Then there must be some extra equations thrown in in the form of dependent sources. You cannot model a 3 terminal device without something like dependent sources. I believe that the inability of the conventional approach to deal with atomic devices with anything other than 2 terminals is a significant disappointment. Further, I believe it is conceptually limiting.
In the presentation of this paper it is very natural to have atomic devices with any number of terminals. This paper presents and uses devices with 1, 2, 3 and 4 terminals. In this paper, quite unlike the conventional approach, currents flow in “links” which are ideal wires. (Note that the word “link” in this paper is used differently from the way the word “link” is used in the conventional approach.) Having currents in links frees devices to be whatever they want to be. Links, of course, have to be two ended. But it is not limiting to have ideal wires be restricted to be two ended. In this presentation, 2 terminal devices are in no way any more legitimate or natural than devices with any other number of terminals.
The whole point of “Elementary Topology and Network Equilibrium Equations” is a complex way to get a complete set of independent equations. With the conventional approach, getting the right equations is a very big issue. If you do not get the right equations, it can lead to the wrong conclusions. It is easy enough to not get the right equations, so there is this complex topology thing with trees, etc. just to have an effective method to get the right equations.
By contrast, in the presentation of this paper, getting the right equations is essentially trivial. There is no issue about getting the right equations. There is no complex procedure required. There is one obvious current balance equation for each device, and then the device characteristics. Period. It is that simple. These are always, even under extremely bizarre and pathological conditions, exactly the right equations from which you get the right conclusions.
There are cases in which the circuit equations should not be complete and independent. Such cases occur pretty frequently. Since the conventional approach is centered on a complex procedure to get complete and independent equations, it does not deal with these cases well. But these are real cases that are accurate models of circuits you can and do actually build. The presentation of this paper deals with cases in which there are no solutions or multiple solutions as being just as natural as when there is a unique solution. When there is no solution, there should not be a solution and it is exactly the correct description of what the circuit behavior is. If there are multiple solutions, there should be multiple solutions and this again is a correct description of what the circuit behavior is. It is not generally appreciated how common these cases are because conventional circuit analysis does not deal with them very well so they tend to be swept under the rug.
Although we did not get into it much in the limited time for circuit analysis in the course, and this paper is quite brief on it too, this approach really provides a natural way to make composite devices; to determine their characteristics, and then to use them in circuits as devices that are completely on a par with atomic devices.
From the method of writing circuit equations presented in this paper it is totally obvious how to write a program to form those equations and solve them. Section 7 describes the writing of a program in detail. This emphasizes how easy it is, but it should not be necessary. It is obvious.
The conventional approach to writing circuit equations is not pointless. The conventional approach results in a very small number of unknowns and a comparably small number of equations. It was designed to do just that. These methods were developed at a time when the equations would have to be solved by hand, perhaps with a slide rule, or with a mechanical calculator at best. It was thought that it was important to get a small number of equations with a small number of unknowns for such a hand solution. This is not unreasonable. If equations are written for the same circuit according to this paper there will be many more unknowns and many more equations. The few classical equations will be quite dense. The many more equations according to this paper will be very sparse.
On the other hand, to really do hand analysis of typical circuits encountered everyday in design, one rarely writes out all the equations and solves them classically. The common circuits can be solved rapidly by hand without the formality of writing the equations out. The method by which one does this is illustrated in section 8. In fact, the way one can rapidly analyze complex circuits as illustrated in section 8 inspired the approach of this paper. As it turns out, really fast hand solution demands a large number of very sparse equations not a smaller number of dense equations. Knowing the method of this paper makes it easy to go to fast hand solution. By contrast, there is much less connection between the conventional approach with dense equations and fast hand solutions. For the few cases where fast methods don’t help and there is no alternative to writing out the equations and solving them classically, it could be argued that dense equations with fewer unknowns is better. But today, one would not do such problems by hand anyway; you would use a circuit analysis program.
1. Introduction
1.1 Circuit Analysis
This is a very modern approach to network analysis. It is strongly influenced by two factors. The first is the explosive growth in the complexity of systems in the last 15 years, which is certain to go on for the foreseeable future. The second is the increasing importance of computers in network analysis.
In the beginning there was classical circuit analysis. There were the classic (mathematical) devices: the resistor, capacitor, and the inductor. These were THE passive linear components. There were a few other (mathematical) elements: the voltage source and the current source and for those who were really with it, the switch. These were the tube days. There were rather few real devices too: the physical realizations of the resistor, capacitor, and inductor, and a few kinds of vacuum tubes and just a few others. For the purpose of analysis, vacuum tubes were represented by combinations of basic devices that have about the same properties (tube equivalent circuit).
Today systems often enough have thousands of components. There are also, a great many real devices. There are switching diodes, voltage reference diodes, current regulator diodes, tunnel diodes, variable capacitance diodes, thyrector diodes, and more, and these are just the diodes. There are also many kinds of transistors. New devices are appearing almost literally every day. If you consider integrated circuits, the possible variety is almost limitless. It would seem that a more open-minded idea of what a device is in the mathematics of network analysis is indicated. The modern trend is to define a device in circuit analysis so that almost anything can be one. There are those (for example in the field called optimal control) essentially doing network analysis wherein a typical component device is an entire computer.
The second big factor influencing the form of this presentation of circuit analysis is the computer. Now much of the network analysis that is actually done is done by computer. A number of systems have been developed so that a circuit can be more or less drawn with a light pen on a graphic display device and the computer immediately analyzes it. The form that network analysis takes in this presentation is intended to be suitable for implementation on a computer.
1.2 Describing Circuits
The complete description of a network is broken into 2 parts. The first part is called network topology. The network is viewed as a bunch of black boxes (we don't ask what is in the boxes). Each black box has a number of terminals, and wires connect various of the terminals. In the network topology then, we are interested in how many black boxes (devices) there are, how many terminals each one has, and exactly which terminals are connected to which other terminals. In the second phase of network analysis we ask what the nature of each device is. We expect the answer to come in the form of the “characteristics of the device”. We still view the device as a black box and we still don't want to know what's inside but rather we want a description of what it does. These characteristics come to us from other fields such as device physics with which we are not concerned in network analysis.
In network analysis we are doing mathematics and strictly speaking, everything we talk about is a mathematical object. I will define devices like resistors purely in mathematical terms with no reference to any physical object at all. For most of the mathematical objects we define, physical objects with the same name exist. The mathematical object is frequently idealized to some degree, but its behavior models a real device well enough to be useful. Better and better models of a real device can be made but making such models is a discipline of study in itself. We associate the real components of a real circuit with mathematical devices that model them, usually of the same name, to get a model of the circuit.
One final remark before we begin is that the presentation will consist essentially of just definitions. The definitions will be presented in the style of formal “definition, theorem, proof mathematics” with little text around them. There are some theorems that are unique to circuit analysis but this presentation is mostly not about theorems. The mathematical objects used here are well known in mathematics. Once we have defined what we are doing, in a real sense, the theorems come from mathematics.
2. Network Topology
2.1 Terminals
Let T be a set with a finite, nonzero number of members. If t is a member of T, then t is called a terminal. T is the set of terminals. Or, in plain English: suppose I have a bunch of things I want to call terminals.
2.2 Links and Currents
Let L be a collection of ordered pairs from T. L may be empty or have any possible ordered pairs in it. L is the set of Links. If l is a member of L, call l a link. Assume that for each link there is a real number. Precisely stated, let C be a function from L into the real numbers. The real number corresponding to any link is the current in that link.
A link is the mathematical object that represents a wire. This says suppose some terminals are connected by wires. A wire is described by telling which two terminals it connects (thus the mathematical object, a link, can just be the pair of terminals). Now wires don't have any special directions - one way along a wire is the same as the other, but currents do go in directions. We arbitrarily assign a direction to the wire just so we will be able to talk about which way the current is going. We do this by saying a link is an ordered pair of terminals. That way we can say the current is positive if it goes from the first terminal to the second and negative if it happens to be going the opposite way.
Let la,b be a link from terminal a to terminal b. If Ia,b is the current in la,b then we say:
· la,b contributes a current Ia,b into b.
· la,b contributes a current Ia,b out of a.
For any terminal t, the current entering t is defined to be the sum of all the contributed currents into t minus the sum of all contributed currents out of t.
{To be absolutely correct, a link is a named ordered pair from T. If a and b are two real terminals in a real world circuit, it would be possible to connect any number of wires between them. Since this is true in the real world, we would like to be able to represent this in the mathematical model with any number of links between the mathematical terminals a and b. Strictly speaking, there can be no more than 2 ordered pairs of the terminals a and b and they would have to be (a, b) and (b, a). Every ordered pair containing a and b must be indistinguishable from one of these. But if we add a name, then there can be any number of named ordered pairs containing a and b, distinguishable by different names. This is an extremely minor point, of very little practical value. It will be completely ignored in this paper except for section 6, which examines the effect of having more than 1 link connecting the same terminals.}
2.3 Nodes and Voltages
A set of all terminals connected by links is called a node. If there are any terminals not elements of links they are also nodes. Thus we see that the terminals are broken up into groups, each group called a node and each terminal is in one and only one node. Let N be the set of nodes.
Assume that there is a real number for each node. Precisely stated, let V be a function from N into the real numbers. The real number corresponding to any node is the voltage at that node.
We want to have voltages at each terminal but we want to make sure that if any two terminals are connected by wires, then they must have the same voltages. We do this by lumping together all the terminals that are joined by wires - they must all have the same voltage - and we call the bunch of terminals a node. We then make voltages properties of the nodes.
We define the voltage at a terminal to be just the voltage of the node to which it belongs.
2.4 Devices
Assume now that D is a collection of disjoint, ordered subsets of T and that if t is a member of T, then t is a member of d for some d in D. The elements, d, of D are called devices, and we observe that each terminal belongs to exactly one device.
The current entering a device is defined to be the sum of all currents entering all terminals of the device.
Each device is an ordered set of terminals. In general, different terminals of the device play different roles in the device characteristics that go with the device. This just means that we can tell which terminal on a device is which.
2.5 A Network Topology
If we have sets T, L, D and functions C and V as described, and if the total current entering each device in D is zero, then (T, L, D, C, V) is called a network topology.
2.6 Semidevices and Ports
There are just a couple more words that will be handy to have around:
If d is a device in a network topology and if S is a subset of d (that is S is some of the terminals in d) such that the sum of the currents entering all the terminals in S = 0 then S is a semidevice. In particular, a semidevice consisting of exactly two terminals is called a port.
Devices that consist of exactly 2 ports are nice for many things. Not surprisingly, such a device is called a “2-port”.
3. Descriptive Remarks.
The plan is to describe a real circuit by associating a network topology with it. The theory consists of saying that for any circuit there is a suitable topology for describing it. Mostly, the network topology is just a way to talk about the terminals and which terminals are connected together, but there is one more very significant thing. There is this condition that in a network topology, the total current entering each device must be 0. This may be viewed as expressing a physical law, conservation of charge. Every network topology must have all of its terminals be members of devices. We can immediately deduce that the total current entering all of the terminals of the entire network topology must also be 0. And now we have asserted that every physical circuit can be described (quite well) by a network topology.
Along with the topology comes a bunch of equations of the form
Ia + Ib
+ ... + Ic - Id -
Ie ... - If = 0
which express the fact that the total current entering each device must be zero. There will be one such equation for each device. The topology also says that there must be a bunch of real numbers called voltages, one for each node, but it says nothing further about the voltages. Consequently the equations involving the currents are the only restrictions on currents and voltages made by the topology.
One wants to also have descriptions of each of the devices in the network. In general, with each device there will be additional restrictions on the permissible choices of numbers for the currents and voltages. These restrictions are called the device characteristics. They may often take the form of one or more equations such as
Vi - Vj
= RIi
Or of inequalities like
Vj ³ Vi
When all the proper characteristics are combined with the topology, the result is a complete description of the circuit. The principle task of network analysis is then to find out exactly what choices of numbers for the currents and voltages are consistent with all restrictions (topology and device characteristics), if any.
There are 3 possibilities: 1. There are no choices of currents and voltages that are consistent with all restrictions; 2. There is exactly one unique set of voltages and currents that satisfy all restrictions; 3. There are many sets of currents and voltages that are consistent. I will say a few words about each of these situations.
There may be no choice of currents and voltages which satisfies all restrictions. This is a situation similar to the case in algebra in simultaneous linear equations when the equations are "inconsistent". In fact, that is often exactly how this happens. There is perhaps a tendency to think of such a case as abnormal. In fact in network analysis, this is a comparatively normal case and gives very useful information. It says DON'T DO IT!! Many circuits can easily be built that result in descriptions with "no solutions". The analysis, in finding no voltages and currents that satisfy all requirements, is telling you that the universe cannot exist in the state that you are describing. It is predicting the end of the universe if you construct this circuit. It seems in practice that some factor, not represented in the formal analysis, always intervenes to prevent destruction of the entire universe. Nevertheless, if you insist on building the circuit you can expect in the worst case catastrophic failure of some of the devices, and in the best case the circuit just won't be useful.
It may be that there is a unique choice of currents and voltages that satisfy all restrictions. We are perhaps conditioned to think of this as normal and desirable. In network analysis, this is extremely abnormal. In any cases we examine, it should not happen. The reason for this is that the topology places no restrictions on the voltages - all restrictions on voltages come from device characteristics. All normal devices we will consider place restrictions only on differences between voltages at pairs of nodes. Physicists have great confidence that it will never be possible to construct a device that can restrict voltages except in terms of differences between two voltages.
One can see that if one has a network (a network is considered to be a network topology along with all device characteristics) that has a solution (that is, there is a choice of currents and voltages satisfying all requirements) that in general, one can add a constant to all voltages and obtain another solution. This is so because all differences between pairs of voltages will remain the same. This is a very normal case. This is also equivalent to saying that there is one free parameter in the system or, stated still differently, one can choose any number at all for one of the voltages and there still remains at least one choice of remaining voltages that produces a solution.
In view of the fact that one voltage can be chosen arbitrarily, it has become customary to choose one node in a network and call it ground. One arbitrarily dictates that the voltage at this node will be zero. The ground node is usually designated with the symbol:
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It has further become customary to not explicitly draw the links connecting all the terminals of the ground node. Thus a network
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may be drawn
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The ground symbol on a terminal means there is a link from that terminal to others of the ground node.
After arbitrarily dictating the voltage of the ground node, one is about equally likely to find that there is then a unique solution or many solutions (assuming there is a solution at all). The job then is to list all the solutions or express them in some form.
4. Some Important Devices and Some Examples.
4.1 One Terminal Devices
There is only one reasonable one terminal device. It is called a tie point and it has no characteristics at all. Thus it places no further restrictions on currents or voltages than just that required by the topology. Physically, the devices that correspond to tie points are just places where a number of wires can be connected together and held, or splices in wires.
4.2 Two Terminal Devices
When one considers 2 terminal devices there is already a wealth of them. I will give a few.
4.2.1 The Current Source
First, there is the current source. It's symbol and characteristics are:
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ti tj Ii
= I |
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where Ii is the current entering terminal ti. I is the value of the current source. Physically, there are current regulator diodes that are well described by a current source over a limited range of conditions. Otherwise current sources are generally made of a number of other components. Power supplies can often be operated in "current regulating mode" in which case they are very well described as current sources. Current sources are very commonly "synthesized" out of other components like transistors and resistors and appear as parts of circuits.
We will analyze two circuits as examples. The first is just the current source alone not connected to anything.
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t1 t2 |
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In the topology we see there are 2 terminals labeled t1 and t2. They form 2 nodes since they are not connected. There are no links. Consequently there are no currents and the current entering terminal t1 = 0. The current entering terminal t2 is 0 too. Topology requires that the current entering t1 + the current entering t2 = 0, i.e., that the current entering the one device = 0. This is trivially satisfied. The device characteristic requires the current entering terminal t1 = I. Except in the special case where I = 0 this is inconsistent and there are no solutions. Current sources should not be "open circuited"; they must always be connected to something.
Consider the second example:
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