Ernie Rael 430 Queens Court Campbell, CA. 95008 Phone 408-378-7562 E-mail err@raelity.com Objective Senior technical contributor to the design and development of system architectures. Education 1969 - 1976 STANFORD UNIVERSITY B.S., Mathematical Sciences, March 1977 M.S., EE: Computer Engineering, January 1977 Summary of qualifications * Java, swing and various java API's. * The primary areas of my experience are system architecture, system debug, hardware programming, unix internals and unix system utilities. * My general system knowledge has led to my involvement with customers. I have dealt with customers during pre-sales, assisting in system feasibility and configuration issues, and in the field doing on-site system evaluation and performance enhancement. * Project leader and management positions. * Engineering and manufacturing diagnostics and stress tests. My primary strengths include: * Debugging hardware, software and situations involving both. * Strong unix experience in all areas. * Self motivating and working well with people. * Can quickly learn and adapt to new requirements. Professional experience Feb 2001 - Jul 2002 Pluris Senior Member, Technical Staff * Pluris built a terabit core router. I joined the company after the first generation hardware was done, Pluris had 50+ software engineers. The software used VxWorks. I became the VxWorks, mmu and crash guru. Much of my activity was event driven. I was frequently consulted to assist in the analysis and debug of failures/crashes throughout the system. Pluris used the PPC750 and PPC860. Memory subsystem * Enhanced the VxWorks-PPC mmu code. PPC750 page table update from 600us to less than 5us. Catch null pointer dereferences. Write protect text, allow software breakpoints. Check for stack overflow at context switch time. * Improve performance of memory allocator for poisoning. Modify VxWorks taskDelete to prevent use of TCB after it is freed, so poisoning could be enabled. Debug functions memBlockFind/memBlockShow. Per task memLeak reporting. * Track per task memory alloc/free. Track deleted tasks holding memory. Fragmentation statistics per task, for malloc. Crash analysis * Detect system crash; save state to nvmem; reboot system; save nvmem to flash file system. Saved state includes stack/tcb of tasks, memory allocation state, event log, panic/restart reason. State saved in an extensible forward/backward compatible format. API for saving/retrieving crash state. * Full memory dump facility. At crash take over hardware, use no software libraries or state. Establish connection with GMCC, send compressed memory core file. Transport over router's internal fabric; developed transport protocol. GMCC saves images to external ftp server. Extend gdb to read core file. General * Designed and implemented per board statistics collection task and API for higher level software and diagnostics. Some interactive commands for debug. * Design and implemented facility so that user logged into router can have a tShell to any board in system. Robust protocol. Make tShell reentrant/multi-user. * Design/implement low level event logger to circular Q. Saved as part of crash/restart. * Design some dynamic priority control, fair scheduler. * Software lead for next generation CPU and CM (control module); participate in hardware design. Participate in spec review for next generation ASICs. * Prelim semaphore design to insure hierarchical usage. * Occasional work on build environment and makefiles. 1997 - 1999 NeoVista Solutions, Inc. (MasPar retargetted, no hardware) Distinguished Engineer NeoVista developed data mining engines, provided data mining services and built applications using data mining. * Lead designer of data mining development and deployment system. It was multi-platform and optimized for deployment on multi-processor systems. Implemented parts of system. Development done in C++. * Supervised design and development of prototype of GUI for developing data mining applications. Took over responsibilities from contractor and turned GUI into a product. Added substantial features including data mining execution, results and wizard/assistant. Development done using tcl and itcl. * Developed a prototype CRM application for selecting an optimal mailing list. Relevant results were displayed graphically and based on the proposed campaign costs and data mining results. Project developed in Java using swing and jdbc. * Designed and developed prototype system for sending customized mailings. Mail was prepared as XHTML (HTML as XML) with custom tags representing per client data. The per client data was fetched from a database. HTML images were supported. The application could display the mail for a sample client (as well as its XML structure) and had features to assist in the preparation of the XHTML. The XHTML was converted to HTML and then the javamail API was used to send it. Project developed in Java. 1990 - 1997 MasPar Computer Corp Software Engineer; Distinguished Engineer MasPar developed and marketed a massively parallel computer, with from 1K to 16K processors, called a DPU (Data Parallel Unit). The DPU had I/O busses with aggregate speeds up to 1 gigabyte per second. The DPU was an attached processor to a Unix system. Much of the work I did had the added dimension of needing to appear "natural" to the Unix system in this attached processor architecture. * Unix/DPU disk driver for disk array attached to the DPU. Utilities for status and configuration of the disk array. Disk array monitoring utilities that provided regular status/error reports through email. * Supported and enhanced DPU parallel I/O primitives. Designed and supervised implementation of I/O profiling for applications. * Designed and implemented multi-user DPU scheduling through the unix kernel. * Designed and implemented DPU ptrace (debugger) unix system calls. * Took over HIPPI SW after initial HW/SW team was fired. Extensive SW rewrite. Lots of hardware debugging. Stress test utilities. MasPar developed an I/O board to attach to disk arrays. Disk arrays could be striped. The board had 4 SCSI channels, 8 Meg disk buffer cache and an I960 processor. * Participated in design of board's architecture. * Wrote diagnostics and boot prom for I/O board. * Supervised kernel I/O driver work. * Considerable hardware debugging assistance. MasPar's 3rd generation product * Member of system architecture design team. * System software team leader. 1987 - 1990 Consultant 1983 - 1987 ARIX (formerly Arete System, Inc) Staff Scientist Arete manufactured supermicros utilizing multiple, tightly coupled cpu's running UNIX. My job description was to fully understand the computer that Arete would develop, including both hardware and software. * Participated in the system level hardware design. Did system and board level debug. * Designed system memory board. * Designed and implemented a system stress test facility used in system burnin. * Assisted in early kernel development. Later did extensive kernel profiling and tuning. * Directed, and assisted in, "C" compiler development (PCC based) and tuning. * Participated in unix utility porting. * Defined the standalone/boot environment. Wrote a disk maintenance and partitioning utility. Worked closely with the engineers responsible for the disk I/O subsystem. Initiated by customer request, Arete developed an Optical disk interface. * Selected optical disk drive and SCSI interface board. * Designed the "raw" and unix file system formats. * Supervised the contractor doing software development. Designed and developed methods to assist HW engineers in state machine design and implementation. * Developed format for specifying state machines, Moore or Mealy. * Utility to convert state machine specification to equations. * Implemented McClusky's prime implicant algorithm for logic reduction. * Utility to program logic equations into various PAL's and PLA's. 1982 Consultant 1979 - 1982 Onyx Systems (Spin-off from IMI by their investors) Software Engineer; Software Engineering Manager; Director of Engineering Onyx's first product was a Z80 based microcomputer. * I/O drivers for Z80 based system, including cartridge tape using SIO and winchester disk. * Ported UCSD Pascal to Onyx System. Provided technical support for a port of OASIS to the system. Onyx's second product was a Z8000 CPU board to run UNIX. * Participated in the initial Version 7 Unix port. Spent over a month in New Jersey porting to System III (at that time AT&T internal only). * Supported Interactive Systems to Port their version of unix. 1979 IMI Member of Technical Staff * Supervised the hardware design of random logic based winchester disk controller. * Defined and implemented an eight bit parallel disk I/O protocol using an embedded Z80. This provided a simple means to integrate the high performance disk into a system using a parallel printer port. 1977 - 1979 Zilog Engineer * Implemented a SystemTest facility used in manufacturing. * Designed and implemented the software for an IC tester developed by Zilog for Zilog chips. The tester was used for both characterization and production test. For characterization, a window based interactive environment was built. * Implemented engineering and manufacturing document control utilities including bill of materials and where used.