The figure above shows my current implementation of the popular integrator-with-reset sawtooth VCO. Very briefly, the circuit operates as follows. Capacitor C2 and op amp OA3 form an active integrator which is driven by current from an exponential current source built around op amp OA2 and the differential transistor pair Q1-Q2. When the integrator output reaches the 4-V threshold set by OA4, the comparitor U1 puts out a short voltage pulse which turns on the FET switch Q3, thereby discharging C2. The charging cycle then begins again. The input control signals are summed and scaled by OA1, with temperature compensation provided by R11. Finally, OA5 scales the output to a 10-V peak value. The design is a modification of the original circuit of Terry Michaels (Electronotes, v. 62).

The main goals of the present design were to reduce the temperature drift and to improve speed and tuning accuracy by employing modern op amps. For improved stability and temperature drift, on-board +/- 6.9 V regulated supplies were added (circuitry around the LM329 chips in the upper right corner of the figure). These are used to supply the critical voltages in the circuitry for: 1) the coarse frequency control (R3), 2) the reference current in the exponential converter (OA2) and 3) the ramp reset point (OA4). For improved op-amp performance in critical parts of the circuit -- OA1, OA2 and OA3 -- I selected the Burr Brown OPA132. This chip was chosen for its combination of low input current (5 pA), fast slew rate (20 V/usec), high stability and moderate price (under $4).

For the comparitor U1, I used the LM319, which is somewhat faster than the original LM311. The capacitor discharge switch chosen is the 2N4391 JFET (Q3). It works almost identically to the original KE4859, which is still available but a bit harder to obtain. The exponential converter uses the LM394CH matched transistor pair (Q1-Q2).

Determining temperature drift can be tricky, as gradients and drafts can complicate the measurement. The prototype circuit was built on a plug-in board, which in turn was mounted on a wooden board. This assembly was then placed on a folded-over heating pad and covered with a plastic lid. This seemed to give fairly reproducible results. Temperature was monitored by an LM335 sensor heat sinked to the expo converter.

First I looked at the oscillator section alone, without the expo converter, and was surprised to find quite a bit of temperature drift. Probing around with heat from a soldering iron tip proved that the discharge FET Q3 was the sensitive component. The problem turned out to be that the discharge time was too short, causing a variation in the discharge level due to the temperature dependence of the FET's channel ("on") resistance. Increasing the discharge-timing cap C4 eliminated this source of drift. The residual drift was quite small, perhaps about 200 ppm/K, but it was hard to get a reliable measurement at this level.

Next I hooked up the expo converter and looked at the overall drift. Converter drift actually involves a temperature-dependent scale factor. In other words, when the differential base-emitter voltage (dV

It turned out that the temperature drift of the full VCO was in the opposite direction from that of the uncompensated converter. This is sensible, as the Q81 resistor R11 has a tempco of 3500 ppm/K vs. the 3300 ppm/K (or so) needed for compensation. This discrepancy was easily fixed by adding a small metal film resistor R12 in series with the Q81, producing a composite with a smaller tempco. For this circuit a value of 174 ohms worked well.

The final result is an essentially negligible temperature dependence of the VCO. At frequencies of 1 kHz and 3 kHz I observed zero frequency change (i.e., under 1 Hz) over a 10 K temperature range. At 200 Hz the drift was 0.5 Hz over a 15 K range. So the drift is less than 0.1 Hz/K or alternately less than 200 ppm/K (or 0.35 cents/K) over the range of 200 Hz - 3 kHz.

The circuit's tracking accuracy is perfect, as close I could measure it. This was done by setting the frequency at the octave values between 110 Hz and 28160 Hz (by beating against a 440 Hz crystal-controlled oscillator) and measuring the corresponding input voltages. Within the 1 mV accuracy of the DVM used, these were in exact 1.000 V steps, indicating better than 0.1% accuracy. The switching reset time is under 0.5 usec, consistent with the OPA132 slew rate and settling time.

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