Kokin Library User's Manual

Hexadecimal (Base 16) numbers are represented using the WLA-DX format of the "$" symbol followed by a string of hexadecimal digits (1-9 and A-F). The hexadecimal digits 'A' through 'F' will always be upper-case. An example of a valid hexadecimal number representation is: $C0FF.

Binary (Base 2) numbers are represented using the WLA-DX format of the "%" symbol follwed by a string of binary digits (0 and 1). An example of a valid binary number representation is: %11100110.

I.2.2 Bit and Byte Order

Bits are numbered starting from right to left, (i.e., least-significant to most-significant.) All bytes consist of eight bits: 0 through 7.

The Sega Mark III Architecture (SM3A) is based on the Zilog Z80 microprocessor. This microprocessor is a little-endian machine, meaning that bytes of a word are numbered starting from the least-significant byte. As a result, the SM3A and AGAMA extensions are also little-endian. The least-significant byte in a word will always be stored to memory first, at the lower address, followed by the most-significant byte at the higher address.

Diagrams of data structures in memory will have lower memory addresses towards the bottom of the page, with higher addresses growing towards the top of the page.

I.2.3 Reserved Bits

In certain register layout descriptions, various bits will be marked as Reserved. These bits are reserved for future expansion of the AGAMA specification, and all reserved bits are implicitly RESET (0). Software should never attempt to SET these bits (to 1). Generally, if the modification of a read-only or reserved bit is attempted an error will occur and the entire write to the register will be discarded. Access to registers with reserved bits should follow the guidelines below:

Do not depend on the states of any reserved bits when testing the values of defined register bits. Mask out the reserved bits when testing.
Do not depend on the states of any reserved bits when storing them to memory or another register.
Always write zeros to the reserved bits.

I.2.4 Instruction Operands

The main processor used in the Sega Mark III Architecture (SM3A) is the Zilog Z80 microprocessor. Therefore, the symbolic representation of instructions is taken directly from Z80 assembly language. The format is shown below:

label: mnemonic argument1, argument2

where:

A label is an identifier followed by a colon (:).
A mnemonic is a reserved name for a class of instruction opcodes which have the same function.
The operands argument1, argument2 are optional. There may be zero, one, or two arguments, depending on the instruction. When present, they are either literals, or data identifiers. The data identifiers are either reserved register names, or are assigned to data items declared elsewhere in the source file.

When two operands are present, the right operand is the source and the left is the destination.

For example:

LOOP1:  LD HL, STARTVALUE

In this example, LOOP1 is a label, LD is the mnemonic identifier for the opcode, HL is the destination operand, and STARTVALUE is the source operand.

Note, though, that this specification deviates slightly from Z80 assembly language with regard to the accumulator (the "A" register). In Z80 assembly language, certain arithmetic instructions use an implied accumulator operand; the accumulator is not explicitly specified in the instruction. For example, the instruction: AND B implies the accumulator is both a source and a destination. In contrast, the assembly language used in this specification always specifies the accumulator. The same instruction is written as: AND A, B in this specification. The object codes for these instructions are identical, just the instruction notation differs.

I.3 Revision History

Version 0.04.00: (September 23, 2006) Updated to correspond to MesaDX 0.04 release. Added KokinCART_A0CD (mapper) and KokinA246 (VDP) devices. Updated AXR, Event and POST Code lists for all devices.

Version 0.03.01: (April 2, 2004) Updated to include new Power-On Configuration bit for SMS1-type bus in the device POCRs. This new POC bit is implemented in the version of the Kokin.dll included with MesaDX 0.03a

Version 0.03.00 (March 13, 2004): Initial version. Coincides with release of MesaDX version 0.03

I.4 Acknowledgements

The Kokin Library and MesaDX could not have existed without the help of numerous people.

Super Majik Spiral Crew, Jon, and Richard Talbot-Watkins: Their documents describing the technical details of the Sega Master System and Sega Game Gear are the foundations of the public's current understanding of these systems.

Andrew Lindsay: Designer of the MK1. His help with the SMS memory system and ROM storage was invaluable. With this information I was able to design and build the SMSARCH, a SMS cartridge backup unit.

James McKay: Provided me with my first glimpse of the SMS memory architecture. Also, for providing miscellaneous information in a (publically released) e-mail converstation with "Neon Spiral Injector."

Bock (or Zoop or Omar Cornut): Bock has been a strong presence in the SMS/GG emulation community. His contributions have on many occasions inspired my own efforts. Additionally, his founding and continuous support of S8-Dev has been a great service to all of us still interested in software development for Sega 8-bit systems.

Maxim: Maxim has made numerous contributions to the world of Sega 8-bit emulation including utilities, demo programs, and technical documents. Maxim is an active member of the S8-Dev forum and can always be depended on to step up and answer the difficult technical questions. Maxim also wrote an outstanding document covering the TI SN76489 sound chip.

Charles MacDonald: Charles' unending work documenting the minutae of the various Video Display Processors used in various SM3A implementations has been invaluable during the development of MesaDX. Charles has also written many test programs and has on several occasions been kind enough to test demo programs on a real SMS.

Martin Konrad: Martin Konrad is the brains behind the SDSC Debug Console. He is also the author of an outstanding SMS debugging emulator, eSMS. eSMS is the first emulator to include an SDSC Debug Console. Hopefully, MesaDX will be the second.

Heliophobe: Heliophobe has made many technical contributions to Sega 8-bit emulation including demos and a SMS emulator for the Dreamcast: SMEG. Heliophobe has also provided feedback and suggestions for improving MesaDX, many of which have been implemented in MesaDX version 0.03.

S8-Dev: All the members of S8-Dev deserve to be thanked, not only for their continuous interest in Sega 8-bit development, but also for perhaps being the only people in the world who might be interested in using an emulator like MesaDX

Quinntesson (Jeff Quinn, my brother, author of the Genesis/SegaCD/32X emulator AGES): His understanding and interest in the more technical aspects of emulation have greatly increased my own understanding of emulation. Our long conversations about all things emulation-related have proved to be invaluable during the (long) development of MesaDX.

Chapter1: Kokin Library Overview

[To Be Completed]

Chapter2: Processor (PROC) Devices

2.1 KokinPROC Overview

2.2 KokinPROC AGAMA Extension Registers

Each AGAMA Device includes a 256-entry 16-bit AGAMA Extension Register (AXR) file. The AXRs contain device configuration and status information. Both software and external debuggers can access the AXRs to change device behavior or to collect device status.

Although 256 registers are available in each device, only 240 of them can be used for device-specific functions. The first 16 AXRs are pre-defined and have the same purpose in every AGAMA Device. At the minimum, each AGAMA device must implement these 16 AXRs. They are described below.

AGAMA Extension Register (AXR)	Register Name
AXR[$00]	Device ID Register (DIR)
AXR[$01]	Power-On Configuration Register (POCR)
AXR[$02]	Device Model Register (DMR)
AXR[$03]	Device Version Register (DVR)
AXR[$04]	Device Status Register (DSR)
AXR[$05]	AGAMA Reserved
AXR[$06]	AGAMA Reserved
AXR[$07]	AGAMA Reserved
AXR[$08]	Event Handling Code Register (EHCR)
AXR[$09]	Event Handling Flags Register (EHFR)
AXR[$0A]	Event Monitor Vector Register (EMVR)
AXR[$0B]	AGAMA Reserved
AXR[$0C]	Device Event Code Register (DECR)
AXR[$0D]	Device Event Address Register (DEAR)
AXR[$0E]	Device Event Data Register (DEDR)
AXR[$0F]	Device Event Flags Register (DEFR)
AXR[$10]	Device Event Flags Register (DSUR)
AXR[$11]	Device Event Flags Register (ISR)
AXR[$12]	Last Branch Source Register (LBSR)
AXR[$13]	Last Branch Destination Register (LBDR)
AXR[$14]	Monitor Event Program Counter Register (MEPCR)
AXR[$15]	Monitor Event Stack Pointer Register (MESPR)
AXR[$0B]-AXR[$1F]	Reserved
AXR[$20]	Register Read Breakpoint Register (RRBR)
AXR[$21]	Register Write Breakpoint Register (RWBR)
AXR[$22]-AXR[$2F]	Reserved
AXR[$30]	Memory Attribute Address Register (MAAR)
AXR[$31]	Memory Attribute Data Register (MADR)
AXR[$32]	Port Attribute Address Register (PAAR)
AXR[$33]	Port Attribute Data Register (PADR)
AXR[$34]-AXR[$FF]	Reserved

Table 2.2.a: KokinPROC AGAMA Extension Registers

2.2.1 KokinPROC AXR[$00]: Device ID Register (DIR)

The Device ID Register contains the 4-bit Device ID for the KokinPROC device. The Device ID is assigned on Power-On and is used to address the KokinPROC during certain types of bus transactions, such as AXR reads and writes.

The Device ID Register is one of the registers required by the AGAMA Specification for all AGAMA Devices. (Please see the AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

DIR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	AGAMA Reserved				Device ID[3:0]

Table 2.2.1.a: Bit Fields of the Device ID Register (DIR)

Access: READ-ONLY

Bit Fields:
Device ID
The 4-bit Device ID for the device.

AGAMA Reserved
These bits are reserved for future expansion.

2.2.2 KokinPROC AXR[$01]: Power-On Configuration Register (POCR)

The Power-On Configuration Register contains the initial configuration settings of the KokinPROC device. The KokinPROC device will sample all the configuration settings and save them in the POCR, but not all the settings are used. The bit field descriptions below indicate which Power-On Configuration settings are ignored by the KokinPROC device.

The Power-On Configuration Register is one of the registers required by the AGAMA Specification for all AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

POCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	POST Code				AGAMA Reserved		Monitor Mode	Suspended
Byte 0	GG Mode	Export Region	50Hz	AGAMA Reserved	SMS1 Bus	Lock Boot Device	Boot Device

Table 2.2.2.a: Bit Fields of the Power-On Configuration Register (POCR)

Access: READ-ONLY

Bit Fields:
POST Code
A 4-bit code indicating the result of the Power-On Self Test (POST) for the KokinPROC device. A zero value indicates that the device passed POST. A non-zero value indicates a failure. A list of the KokinPROC POST failure codes, along with detailed descriptions for each code, can be found in Appendix B: Power-On Self Test (POST) Code Summary

Monitor Mode
If this bit is set, the KokinPROC device powered-on in Monitor Mode. Otherwise, the KokinPROC device powered-on in Compatible Mode. Monitor mode is disabled in the current release of the Kokin Library, so this bit will always be reset (0).

Suspended
If this bit is set, the KokinPROC device powered-on suspended. If not set, the KokinPROC device powered-on resumed and immediately began fetching and executing instructions.

GG Mode
The KokinPROC device ignores this bit since its operation is independent of the SMS or GG operating modes.

Export Region
The KokinPROC device ignores this bit since its operation is independent of the region setting of the machine.

50Hz
The KokinPROC device uses this bit to determine how many instructions to execute during a single scanline. (MesaDX currently uses a single scanline as the smallest unit of emulation time.)

SMS1 Bus
The KokinPROC device uses this bit to correctly emulate the operation of a SMS1 Bus. A SMS1 Bus retains the previously driven data value. In contrast SMS2/GG busses return $FF if no data value is driven on the bus.

Lock Boot Device
The KokinPROC device ignores this bit.

Boot Device
The KokinPROC device ignores these bits since its operation is independent of the initial boot device.

AGAMA Reserved
These bits are reserved for future expansion.

2.2.3 KokinPROC AXR[$02]: Device Model Register (DMR)

The Device Model Register contains the KokinPROC device's model number: A080. The 'A' indicates that the KokinPROC is an AGAMA Device, and the '080' indicates compatiblity with the Zilog Z80 microprocessor.

The Device Model Register is one of the registers required by the AGAMA Specification for all AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

DMR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Model Number
Byte 0	Model Number

Table 2.2.3.a: Bit Fields of the Device Model Register (DMR)

Access: READ-ONLY

Bit Fields:
Model Number
The KokinPROC device's model number. The current model number for this device is A080.

2.2.4 KokinPROC AXR[$03]: Device Version Register (DVR)

The Device Version Register specifies the implementation version of the KokinPROC device. Currently, the version number is 00.00 for all devices in the Kokin library.

The Device Version Register is one of the registers required by the AGAMA Specification for all AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

DVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Major Version
Byte 0	Minor Version

Table 2.2.4.a: Bit Fields of the Device Version Register (DVR)

Access: READ-ONLY

Bit Fields:
Major Version
The major version number of the device implementation.

Minor Version:
The minor version number of the device implementation.

2.2.5 KokinPROC AXR[$04]: Device Status Register (DSR)

The Device Status Register contains general information about the KokinPROC device's current state.

The Device Status Register is one of the registers required by the AGAMA Specification for all AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

DSR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent Set	Monitor Silent Set	Global Compatible Silent Set	Global Monitor Silent Set	Device Enabled	Shutdown	Monitor Mode	Suspended
Byte 0	Halted	Reserved

Table 2.2.5.a: Bit Fields of the Device Status Register (DSR)

Access: READ-ONLY

Bit Fields:
Compatible Silent Set
A COMPATBILESILENT flag is set in one of the KokinPROC device's EHFR registers. If this bit is set and the KokinPROC device is in Compatible Mode when it receives a CLEARSILENTFLAGS message then the COMPATIBLESILENT and MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Monitor Silent Set
A MONITORSILENT flag is set if one of the KokinPROC device's EHFR registers. If this bit is set and the device is in Monitor Mode when it receives a CLEARSILENTFLAGS message then the MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Global Compatible
Silent Set
A COMPATBILESILENT flag is set in one of any of the system device's EHFR registers. If this bit is set and the KokinPROC device is in Compatible Mode then it must issue a CLEARSILENTFLAGS message when the current instruction retires. This ensures that specific breakpoint will only trigger once per instruction.

Global Monitor
Silent Set
A MONITORSILENT flag is set in one of any of the system device's EHFR registers. If this bit is set and the KokinPROC device is in Monitor Mode then it must issue a CLEARSILENTFLAGS message when the current instruction retires. This ensures that specific breakpoint will only trigger once per instruction.

Device Enabled
The KokinPROC device is enabled. This bit is always set in this version of the KokinPROC implementation.

Shutdown
The KokinPROC device has entered Shutdown. The KokinPROC device will no longer respond to bus transactions, other than SYSMESSAGE transactions, and will not fetch or execute instructions. A Power-On (Hard-Reset) is required to bring the KokinPROC device and the rest of the system out of shutdown.

Monitor Mode
The KokinPROC device is operating in Monitor Mode. All Monitor Mode functionality has been disabled in this release of the Kokin library, so this bit will always be reset (0).

Suspended
The KokinPROC device has suspended. The device will still respond to bus traffic, but will not perform any "active" processing such as fetching and executing instructions.

Halted
This bit is set if the KokinPROC device just executed a HALT instruction. This bit is required to correctly emulated the behavior of interrupts during a HALT instruction.

Reserved
These bits are reserved for future expansion.

2.2.6 KokinPROC AXR[$08]: Event Handling Code Register (EHCR)

The Event Handling Code Register is used to control the data appearing in the Event Handling Flags Register (EHFR). Together, the EHCR and EHFR control the access to the event flags that indicate how an event should be handled when it occurs. The event flags in the EHFR correspond to the event code in the EHCR. Writing a new event code to the EHCR will update the EHFR with that event's flags which can then be modified via the EHFR. The event codes for the KokinPROC device can be found in Appendix C: Event Code Summary.

The Event Handling Code Register is one of the registers required by the AGAMA Specification for all AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

EHCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 2.2.6.a: Bit Fields of the Event Handling Code Register (EHCR)

Access: READ/WRITE

Bit Fields:
Event Code
The Event Code indicates which event the flags in the Event Handling Flags Register (EHFR) correspond to.

AGAMA Reserved
These bits are reserved for future expansion.

2.2.7 KokinPROC AXR[$09]: Event Handling Flags Register (EHFR)

The Event Handling Flags Register is a window into the 256-entry event flags table. Together, the EHCR and EHFR control the access to the event flags that indicate how an event should be handled when it occurs. The event flags in the EHFR correspond to the event code in the EHCR. Writing a new event code to the EHCR will update the EHFR with that event's flags which can then be modified via the EHFR.

The Event Handling Flags Register is one of the registers required by the AGAMA Specification for all AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

EHFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 2.2.7.a: Bit Fields of the Event Handling Flags Register (EHFR)

Access: READ/WRITE

Bit Fields:
Compatible Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinPROC device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinPROC device receives a CLEARSILENTFLAGS message while in Compatible Mode, this bit (along with the Monitor Silent bit) is cleared for all 256 events. If the device is in Monitor Mode, this bit is not affected by a CLEARSILENTFLAGS message.

Monitor Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinPROC device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinPROC device receives a CLEARSILENTFLAGS message while in Monitor Mode, this bit is cleared for all 256 events.

Shutdown
Setting this bit indicates that the system should enter Shutdown mode when the event triggers. This flag is only examined if no other event handling flag is set (such as Monitor Mode or Suspend described below). Shutdown mode is used when an error or event occurs and no error recovery is possible. For example, if the KokinPROC device encounters an unknown opcode the system may enter shutdown if no other event handling is specified. For Events and Event Handling for more information about shutdown and the different types of device events.

Monitor Mode
Setting this bit indicates that the system should enter Monitor Mode when the event triggers. This bit is read-only for all devices in this version of the Kokin Library.

Suspend
Setting this bit indicates that the system should suspend execution when the event triggers.

AGAMA Reserved
These bits are reserved for future expansion.

2.2.8 KokinPROC AXR[$0A]: Event Monitor Vector Register (EMVR)

The Event Monitor Vector Register (EMVR) contains the address of the KokinPROC device's Monitor Mode handler. When a device event triggers and the Monitor Mode event flag is set, the device will request that the system enter Monitor Mode and program flow will jump to the address specified in this register. Monitor mode is not available in the current release of the Kokin Library, so this register is not used, but it can be written to.

The Event Monitor Vector Register is one of the registers required by the AGAMA Specification for all AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

EMVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Monitor Vector Address[15:8]
Byte 0	Monitor Vector Address[7:0]

Table 2.2.8.a: Bit Fields of the Event Monitor Vector Register (EMVR)

Access: READ/WRITE

Bit Fields:
Monitor Vector Address
The address of the KokinPROC device's Monitor Mode handler.

2.2.9 KokinPROC AXR[$0C]: Device Event Code Register (DECR)

The Device Event Code Register (DECR) contains the 8-bit event code of the last event that triggered. This register will retain its value until another event is triggered. Silenced events do not trigger and will not update this register. Other information about the last triggered event can be found in the Device Event Address Register (DEAR), Device Event Data Register (DEDR), and Device Event Flags Register (DEFR),

The Device Event Code Register is one of the registers required by the AGAMA Specification for all AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

DECR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 2.2.9.a: Bit Fields of the Device Event Code Register (DECR)

Access: READ-ONLY

Bit Fields:
Event Code
The 8-bit event code for the last triggered event.

AGAMA Reserved
These bits are reserved for future expansion.

2.2.10 KokinPROC AXR[$0D]: Device Event Address Register (DEAR)

The Device Event Address Register (DEAR) contains the 16-bit address (or 8-bit port) specific to the last event that triggered. For example, if a memory write event triggered, then this register will contain the address the data was to be written to. This register will retain its value until another event is triggered. Silenced events do not trigger and will not update this register. Other information about the last triggered event can be found in the Device Event Code Register (DECR), Device Event Data Register (DEDR), and Device Event Flags Register (DEFR),

The Device Event Address Register is one of the registers required by the AGAMA Specification for all AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

DEAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Address[15:8]
Byte 0	Event-specific Address[7:0]

Table 2.2.10.a: Bit Fields of the Device Event Address Register (DEAR)

Access: READ-ONLY

Bit Fields:
Event-specific Address
A 16-bit address (or 8-bit port) specific to the event that triggered. For example, if a memory write event was triggered then this register will contain the address the data was to be written to. This register retains its value until another event is triggered.

2.2.11 KokinPROC AXR[$0E]: Device Event Data Register (DEDR)

The Device Event Data Register (DEDR) contains data specific to the last event that triggered. For example, if a memory write event triggered, then this register will contain the write data. This register will retain its value until another event is triggered. Silenced events do not trigger and will not update this register. Other information about the last triggered event can be found in the Device Event Code Register (DECR), Device Event Address Register (DEAR), and Device Event Flags Register (DEFR),

The Device Event Data Register is one of the registers required by the AGAMA Specification for all AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

DEDR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Data[15:8]
Byte 0	Event-specific Data[7:0]

Table 2.2.11.a: Bit Fields of the Device Event Data Register (DEDR)

Access: READ-ONLY

Bit Fields:
Event-specific Data
16-bits of data specific to the event that triggered. For example, if a memory write event was triggered then this register will contain the write data. This register retains its value until another event is triggered.

2.2.12 KokinPROC AXR[$0F]: Device Event Flags Register (DEFR)

The Device Event Flags Register (DEFR) contains a copy of the Event Handling Flags Register (EHFR) for the event that triggered. This register will retain its value until another event is triggered. Silenced events do not trigger and will not update this register. Other information about the last triggered event can be found in the Device Event Code Register (DECR), Device Event Address Register (DEAR), and Device Event Data Register (DEDR),

The Device Event Flags Register is one of the registers required by the AGAMA Specification for all AGAMA Extension Register (AXR) Files section in the AGAMA Specification for more information about required AXRs.

DEFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 2.2.12.a: Bit Fields of the Device Event Flags Register (DEFR)

Access: READ-ONLY

Bit Fields:
Compatible Silent
The Compatible Silent flag is set for the triggered event. The next time this event occurs while the KokinPROC device is in Compatible Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Silent
The Monitor Silent flag is set for the triggered event. The next time this event occurs while the KokinPROC device is in Monitor Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Shutdown
The Shutdown flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Shutdown mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Mode
The Monitor Mode flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Monitor Mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Suspend
The Suspend flag is set for the triggered event, indicating that one possible mechanism for handling the event was to suspend execution. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

AGAMA Reserved
These bits are reserved for future expansion.

2.2.13 KokinPROC AXR[$10]: Device State Update Register (DSUR)

This register is not implemented in this version of KokinPROC.

2.2.14 KokinPROC AXR[$11]: Interrupt Status Register (ISR)

This register contains information about pending INTs and NMIs, and whether interrupts are enabled.

ISR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	INT Acknowledge Pending	INT Pending	INT Accept	INT Enable	NMI Acknowledge Pending	NMI Pending	NMI Accept	NMI Enable

Table 2.2.14.a: Bit Fields of the CPU's Interrupt Status Register (ISR)

Access: READ-ONLY

Bit Fields:
INT Acknowledge
Pending
This bit is used by the processor to determine if an INT is pending. During normal execution, this bit is equal to INT Pending. However, during an NMI this bit is RESET, thus preventing the processor from acknowledging the INT. Upon RETN from an NMI handler INT Pending is copied into this bit. If an INT was pending, the processor will now acknowledge it.

INT Pending
Indicates that an INT is pending.

INT Accept
When set, this bit indicates that INT's can be accepted. It is always equal to INT Enable, except during execution of NMI. This bit corresponds to IFF1 in a real Z80 processor.

INT Enable:
Enables INTs. This bit is set with EI and cleared with DI. It corresponds to IFF2 in a real Z80 processor.

NMI Acknowledge
Pending:
This bit only has meaning in Monitor Mode. The current version of MesaDX does not implement Monitor Mode.

NMI Pending:
This bit only has meaning in Monitor Mode. The current version of MesaDX does not implement Monitor Mode.

NMI Accept:
This bit only has meaning in Monitor Mode. The current version of MesaDX does not implement Monitor Mode.

NMI Enable:
This bit only has meaning in Monitor Mode. The current version of MesaDX does not implement Monitor Mode.

Reserved:
These bits are reserved for future expansion.

2.2.15 KokinPROC AXR[$12]: Last Branch Source Register (LBSR)

This register contains the PC where the most-recently-executed branch (JP, JR, CALL, RET) was executed.

LBSR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	PC [15:8]
Byte 0	PC [7:0]

Table 2.2.15.a: Bit Fields of the CPU's Last Branch Source Register (LBSR)

Access: READ-ONLY

Bit Fields:
PC
PC of the most-recently-executed branch instruction.

2.2.16 KokinPROC AXR[$13]: Last Branch Destination Register (LBDR)

Destination address of the most-recently-executed branch (JP, JR, CALL, RET) instruction.

LBDR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	PC [15:8]
Byte 0	PC [7:0]

Table 2.2.16.a: Bit Fields of the CPU's Last Branch Destination Register (LBDR)

Access: READ-ONLY

Bit Fields:
PC
Destination address of the most-recently-executed branch instruction.

RRBR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AFP	HLP	DEP	BCP	IY	IX	SP	I
Byte 0	A	F	L	H	E	D	C	B

Table 2.2.19.a: Bit Fields of the CPU's Register Read Breakpoint Register (RRBR)

Access: READ/WRITE

Bit Fields:
AFP
Set this bit to trigger a REGISTER_READ event whenever the AF' register is read.

HLP
Set this bit to trigger a REGISTER_READ event whenever the HL' register is read.

DEP
Set this bit to trigger a REGISTER_READ event whenever the DE' register is read.

BCP
Set this bit to trigger a REGISTER_READ event whenever the BC' register is read.

IY
Set this bit to trigger a REGISTER_READ event whenever the IY' register is read.

IX
Set this bit to trigger a REGISTER_READ event whenever the IX' register is read.

SP
Set this bit to trigger a REGISTER_READ event whenever the SP' register is read.

I
Set this bit to trigger a REGISTER_READ event whenever the I register is read.

A
Set this bit to trigger a REGISTER_READ event whenever the A register is read.

F
Set this bit to trigger a REGISTER_READ event whenever the F register is read.

L
Set this bit to trigger a REGISTER_READ event whenever the L register is read.

H
Set this bit to trigger a REGISTER_READ event whenever the H register is read.

E
Set this bit to trigger a REGISTER_READ event whenever the E register is read.

D
Set this bit to trigger a REGISTER_READ event whenever the D register is read.

C
Set this bit to trigger a REGISTER_READ event whenever the C register is read.

B
Set this bit to trigger a REGISTER_READ event whenever the B register is read.

2.2.20 KokinPROC AXR[$21]: Register Write Breakpoint Register (RWBR)

This register is used to trigger REGISTER_WRITE events when the PROC's general-purpose registers are written to. REGISTER_WRITE events don't exist for the PC or R registers since their values change with every instruction.

RWBR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AFP	HLP	DEP	BCP	IY	IX	SP	I
Byte 0	A	F	L	H	E	D	C	B

Table 2.2.20.a: Bit Fields of the CPU's Register Write Breakpoint Register (RWBR)

Access: READ/WRITE

Bit Fields:
AFP
Set this bit to trigger a REGISTER_WRITE event whenever the AF' register is written.

HLP
Set this bit to trigger a REGISTER_WRITE event whenever the HL' register is written.

DEP
Set this bit to trigger a REGISTER_WRITE event whenever the DE' register is written.

BCP
Set this bit to trigger a REGISTER_WRITE event whenever the BC' register is written.

IY
Set this bit to trigger a REGISTER_WRITE event whenever the IY' register is written.

IX
Set this bit to trigger a REGISTER_WRITE event whenever the IX' register is written.

SP
Set this bit to trigger a REGISTER_WRITE event whenever the SP' register is written.

I
Set this bit to trigger a REGISTER_WRITE event whenever the I register is written.

A
Set this bit to trigger a REGISTER_WRITE event whenever the A register is written.

F
Set this bit to trigger a REGISTER_WRITE event whenever the F register is written.

L
Set this bit to trigger a REGISTER_WRITE event whenever the L register is written.

H
Set this bit to trigger a REGISTER_WRITE event whenever the H register is written.

E
Set this bit to trigger a REGISTER_WRITE event whenever the E register is written.

D
Set this bit to trigger a REGISTER_WRITE event whenever the D register is written.

C
Set this bit to trigger a REGISTER_WRITE event whenever the C register is written.

B
Set this bit to trigger a REGISTER_WRITE event whenever the B register is written.

2.2.21 KokinPROC AXR[$30]: Memory Attribute Address Register (MAAR)

The MAAR is used to index the memory attribute data (available in the MADR). Memory attribute data is stored for every memory address. The address in the MAAR indicates the address whose attribute data is displayed in the MADR.

MAAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Address [15:8]
Byte 0	Address [7:0]

Table 2.2.21.a: Bit Fields of the CPU's Memory Attribute Address Register (MAAR)

Access: READ/WRITE

Bit Fields:
Address
Memory address whose attributes should be displayed in the MADR.

2.2.22 KokinPROC AXR[$31]: Memory Attribute Data Register (MADR)

The attributes for the memory byte indicated in the MAAR. To set an event to trigger for a specific address access, first place the desired memory address in the MAAR. Next, set the bits representing the type of event you want based on the bit positions in the table below.

MADR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Reserved					Read Event	Write Event	Fetch Event

Table 2.2.22.a: Bit Fields of the CPU's Memory Attribute Data Register (MADR)

Access: READ/WRITE

Bit Fields:
Read Event
Set this bit to trigger a MEMORY_READ event when the specified address is read from.

Write Event
Set this bit to trigger a MEMORY_WRITE event when the specified address is written to.

Fetch Event
Set this bit to trigger a MEMORY_FETCH event when an instruction is fetched from the specified address. Note that if any byte of the instruction (not just the first byte) occurs at this address, an event will trigger.

Reserved
These bits are reserved for future expansion.

2.2.23 KokinPROC AXR[$32]: Port Attribute Address Register (PAAR)

The PAAR is used to index the port attribute data (available in the PADR). Port attribute data is stored for every I/O port. The port number in the PAAR indicates the port whose attribute data is displayed in the PADR.

PAAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Port [7:0]

Table 2.2.23.a: Bit Fields of the CPU's Port Attribute Address Register (PAAR)

Access: READ/WRITE

Bit Fields:
Port
Number of the port whose attributes should be displayed in the PADR.

2.2.24 KokinPROC AXR[$33]: Port Attribute Data Register (PADR)

The attributes for the port indicated in the PAAR. To set an event to trigger for the specific port access, first place the desired port address in the PAAR. Next, set the bits representing the type of event you wnat based on the bit positions in the table below.

PADR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Reserved					Port In Event	Port Out Event	Reserved

Table 2.2.24.a: Bit Fields of the Port Attribute Data Register (PADR)

Access: READ/WRITE

Bit Fields:
Port In Event
Set this bit to trigger a PORT_IN event when the specified port is read from.

Port Out Event
Set this bit to trigger a PORT_OUT event when the specified port is written to.

Reserved
These bits are reserved for future expansion.

2.3 KokinPROC Events

Event Code	Event Mnemonic
$00 - $03	AGAMA Reserved
$04	KOKINPROC_EVENT_CP_WRITE_READONLY_AXR
$05	KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT
$06	KOKINPROC_EVENT_CP_WRITE_RESERVED_AXR
$07	KOKINPROC_EVENT_CP_READ_READONLY_AXR
$08 - $0F	AGAMA Reserved
$10 - $1F	Reserved
$20	KOKINPROC_EVENT_CP_INVALID_INSTR
$21 - $7F	Reserved
$80	KOKINPROC_EVENT_BP_INSTR_RETIRE
$81	KOKINPROC_EVENT_BP_UNDOCUMENTED_RETIRE
$82	KOKINPROC_EVENT_BP_INCORRECT_RESPONSE_SIZE
$83 - $8F	Reserved
$90	KOKINPROC_EVENT_BP_HALT
$91	KOKINPROC_EVENT_BP_JP
$92	KOKINPROC_EVENT_BP_CALL
$93	KOKINPROC_EVENT_BP_RET
$94	KOKINPROC_EVENT_BP_RST
$95 - $A0	Reserved
$A1	KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRWRITE
$A2	KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRREAD
$A3 - $A7	Reserved
$A8	KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMFETCH
$A9	KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMWRITE
$AA	KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMREAD
$AB - $AC	Reserved
$AD	KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTOUT
$AE	KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTIN
$AF - $B0	Reserved
$B1	KOKINPROC_EVENT_BP_REGISTER_WRITE
$B2	KOKINPROC_EVENT_BP_REGISTER_READ
$B3 - $F7	Reserved
$B8	KOKINPROC_EVENT_BP_MEMORY_FETCH
$B9	KOKINPROC_EVENT_BP_MEMORY_WRITE
$BA	KOKINPROC_EVENT_BP_MEMORY_READ
$BB - $BC	Reserved
$BD	KOKINPROC_EVENT_BP_PORT_OUT
$BE	KOKINPROC_EVENT_BP_PORT_IN
$BF - $FF	Reserved

Table 2.3.a: KokinPROC Events

2.3.1 Event[$04] KOKINPROC_EVENT_CP_WRITE_READONLY_AXR

This event triggers when a write to a read-only AGAMA Extension Register (AXR) is attempted. The write attempt is ignored, and the destination AXR value does not change. The write data is placed in the DEDR when this event triggers.

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event.

$04	KOKINPROC_EVENT_CP_WRITE_READONLY_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0004
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.2 Event[$05] KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT

This event triggers when a write (that would change the state) of one or more read-only bits in an AGAMA Extension Register (AXR) is attempted. Even though some bits in the AXR may be writable, none will be updated at all if this event triggers (all write data is discarded). A bit-mask of the read-only bits that would have been affected will be placed in the DEDR.

$05	KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0005
	DEAR:	Index of the destination AXR
	DEDR:	A bit-mask of the affected read-only bits
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.3 Event[$06] KOKINPROC_EVENT_CP_WRITE_RESERVED_AXR

This event triggers when a write to a reserved AGAMA Extension Register (AXR) is attempted. The write attempt is ignored, and the destination AXR value does not change. The write data is placed in the DEDR when this event triggers.

$06	KOKINPROC_EVENT_CP_WRITE_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0006
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.4 Event[$07] KOKINPROC_EVENT_CP_READ_RESERVED_AXR

This event triggers when a read from a reserved AGAMA Extension Register (AXR) is attempted. Since the AXR is reserved noread data is returned. A value of 0 is placed in the DEDR.

$07	KOKINPROC_EVENT_CP_READ_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0007
	DEAR:	Index of the destination AXR
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.5 Event[$20] KOKINPROC_EVENT_CP_INVALID_INSTR

This event triggers when an invalid instruction (opcode) is encountered. An invalid instruction is either one that is truly not part of the Z80 instruction set (excluding the so-called "undocumented opcodes" which are mostly implemented), or one that is not yet emulated (deliberately or by some oversight on the part of the author). The Program Counter (PC) is not updated if this event triggers. The PC will stay pointed to the invalid instruction. See Appendix A for a complete list of the instructions supported by the KokinPROC device.

$20	KOKINPROC_EVENT_CP_INVALID_INSTR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0020
	DEAR:	PC of the invalid instruction
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.6 Event[$80] KOKINPROC_EVENT_BP_INSTR_RETIRE

This event triggers when an instruction retires. This event is primarily used to enable single-stepping through the instruction stream as this event can trigger after every instruction completion. This is the only breakpoint-type event in KokinPROC that cannot be silenced. Attempting to set the silence flags in the EHFR for this event will trigger a KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event.

This is a breakpoint event, so if no handling method is specified for this event then the event is ignored and will not trigger.

$80	KOKINPROC_EVENT_BP_INSTR_RETIRE
Type	BREAKPOINT
Default Action	None
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0080
	DEAR:	PC of the retired instruction
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.7 Event[$81] KOKINPROC_EVENT_BP_UNDOCUMENTED_INSTR

This event triggers when an undocumented instruction is encountered. The event will trigger before the instruction is executed, so the Program Counter (PC) will still point to the undocumented instruction. This event can be used to find instructions that are supported in the Z80 Instruction Set, but are not officially documented in the Z80 specification. KokinPROC implements most of the known undocumented instructions. See Appendix A for a complete list of the instructions supported by the KokinPROC device, including those that are considered to be 'undocumented' and can trigger this event.

This is a breakpoint event, so if no handling method is specified for this event then the event is ignored and will not trigger. Also, because this is a breakpoint event, the appropriate silent flag (depending on the current operating mode) will automatically be set when the event triggers (this will be reflected in the DEDR). The silent flag will be cleared automatically when the current instruction retires.

$81	KOKINPROC_EVENT_BP_UNDOCUMENTED_INSTR
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0081
	DEAR:	PC of the undocumented instruction
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.8 Event[$82] KOKINPROC_EVENT_BP_INCORRECT_RESPONSE_SIZE

This event triggers when a bus request made by the KokinPROC recieves the incorrect response size. For example, if the KokinPROC issues a MEM_READ_WORD, then it expects a response indicating two bytes are being returned. Though this event can theoretically be triggered for any bus request type, it will generally only trigger for multi-byte memory requests (read word, write word, instruction fetch). The reason is that such memory accesses can cross an address boundary where two different devices (e.g., cartridge ROM and System RAM) should respond, but only one does (probably because the other has been disabled). If no devices respond, then a separate group of events called KOKINPROC_EVENT_BP_NORESPONSE_ON_* will trigger, depending on the original bus request type. (These events are described below.)

If the KOKINPROC_EVENT_BP_INCORRECT_RESPONSE_SIZE event ever triggers on a byte transaction (port in, port out, memory read byte, memory write byte), or an AGAMA Extension Register (AXR) access transaction (read AXR, write AXR) then there is an implementation error in whatever devices are responding. The event should never trigger on any of these types of transactions when KokinPROC is used with other devices provided in the Kokin DLL. (These devices have been extensively tested, ensuring that all the responses are valid for the given request type.) The only time this event should ever trigger (when used with Kokin DLL devices) is if a memory access crosses a device address boundary, and one device has been disabled.

$82	KOKINPROC_EVENT_BP_INCORRECT_RESPONSE_SIZE
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0082
	DEAR:	Address associated with the original request
	DEDR:	Data associated with the original request
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.9 Event[$90] KOKINPROC_EVENT_BP_HALT

This event triggers when a HALT instruction is encountered, but before the HALT instruction executes. This event is one of several that can be used to set breakpoints for specific types of instructions.

$90	KOKINPROC_EVENT_BP_HALT
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0090
	DEAR:	Current PC (pointing to HALT instruction)
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.10 Event[$91] KOKINPROC_EVENT_BP_JP

This event triggers when a "Jump" instruction (conditional or unconditional) is encountered. The event occurs before the instruction is executed, so the PC still points to the jump, and not the jump destination. This event is one of several that can be used to set breakpoints for specific types of instructions.

$91	KOKINPROC_EVENT_BP_JP
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0091
	DEAR:	Current PC (pointing to Jump instruction)
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.11 Event[$92] KOKINPROC_EVENT_BP_CALL

This event triggers when a CALL instruction (conditional or unconditional) is encountered. The event occurs before the instruction is executed, so the PC still points to the CALL, and not the call destination. This event is one of several that can be used to set breakpoints for specific types of instructions.

$92	KOKINPROC_EVENT_BP_CALL
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0092
	DEAR:	Current PC (pointing to CALL instruction)
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.12 Event[$93] KOKINPROC_EVENT_BP_RET

This event triggers when a RET instruction (conditional or unconditional) is encountered. The event occurs before the instruction is executed, so the PC still points to the RET, and not the return destination. This event is one of several that can be used to set breakpoints for specific types of instructions.

$93	KOKINPROC_EVENT_BP_RET
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0093
	DEAR:	Current PC (pointing to RET instruction)
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.13 Event[$94] KOKINPROC_EVENT_BP_RST

This event triggers when a RST instruction is encountered. The event occurs before the instruction is executed, so the PC still points to the RST, and not the reset destination. This event is one of several that can be used to set breakpoints for specific types of instructions.

$94	KOKINPROC_EVENT_BP_RST
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0094
	DEAR:	Current PC (pointing to RST instruction)
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.14 Event[$A1] KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRWRITE

This event triggers when an AXR write is attempted, and there is no response for the transaction. This event will not trigger in the event that the target device's AXR was read-only or contained read-only bits. In that case, the target device will signal an event (because the KOKINPROC_EVENT_CP_WRITE_READONLY_AXR, KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BITS and KOKINPROC_EVENT_CP_WRITE_RESERVED_AXR events are compulsory in all AGAMA devices). This signal will be included as part of the response to KokinPROC, so this NORESPONSE event is not applicable. This event can be used to set breakpoints for AXR writes that may not complete correctly due to the target device being disabled.

$A1	KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRWRITE
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00A1
	DEAR:	Bits[15:8]: Target Device ID, Bits[7:0]: Index of the destination AXR Current PC (pointing to RST instruction)
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.15 Event[$A2] KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRREAD

This event triggers when an AXR read is attempted, but there is no response for the transaction. This event will not trigger in the event that the target device's AXR is a reserved AXR. In that case, the target device will signal an event (because the KOKINPROC_EVENT_CP_READ_RESERVED_AXR event is compulsory in all AGAMA devices). This signal will be included as part of the response to KokinPROC, so this NORESPONSE event is not applicable. This event can be used to set breakpoints for AXR reads that may not complete correctly due to the target device being disabled.

$A2	KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRREAD
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00A2
	DEAR:	Bits[15:8]: Target Device ID, Bits[7:0]: Index of the destination AXR
	DEDR:	Undriven Bus Data ($FFFF)
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.16 Event[$A8] KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMFETCH

This event triggers when an instruction fetch is attempted, but there is no response for the transaction. This event can be used to set breakpoints for instruction fetches that may not complete correctly due to the device that would normally resond to requests made in the addressed range being disabled.

$A8	KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMFETCH
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00A8
	DEAR:	Current PC (address of fetch)
	DEDR:	Undriven Bus Data ($FFFF)
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.17 Event[$A9] KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMWRITE

This event triggers when a memory write is attempted, but there is no response for the transaction. This event can be used to set breakpoints for memory writes that may not complete correctly due to the device that would normally respond to requests made in the addressed range being disabled.

$A9	KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMWRITE
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00A9
	DEAR:	Target address
	DEDR:	Write data
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.18 Event[$AA] KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMREAD

This event triggers when a memory read is attempted, but there is no response for the transaction. This event can be used to set breakpoints for memory reads that may not complete correctly due to the device that would normally respond to requests made in the addressed range being disabled.

$AA	KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMREAD
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00AA
	DEAR:	Target address
	DEDR:	Undriven Bus Data ($FFFF)
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.19 Event[$AD] KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTOUT

This event triggers when a port out write is attempted, but there is no response for the transaction. This event can be used to set breakpoints for I/O port writes that may not complete correctly due to the device that would normally respond to requests made in the addressed range being disabled.

$AD	KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTOUT
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00AD
	DEAR:	Target port
	DEDR:	Write out data
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.20 Event[$AE] KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTIN

This event triggers when a port in read is attempted, but there is no response for the transaction. This event can be used to set breakpoints for I/O port reads that may not complete correctly due to the device that would normally respond to requests made in the addressed range being disabled.

$AE	KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTIN
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00AE
	DEAR:	Target port
	DEDR:	Undriven Bus Data ($FFFF)
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.21 Event[$B1] KOKINPROC_EVENT_BP_REGISTER_WRITE

This event triggers when a write to a general-purpose (Z80 architectural) register is attempted, and that register's breakpoint bit in the Register Write Breakpoint Register (RWBR) has been set. This event is used to implement register write breakpoints by setting the SUSPEND bit in this event's Event Handling Flags Register (EHFR), and when used in conjunction with the RWBR.

$B1	KOKINPROC_EVENT_BP_REGISTER_WRITE
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00B1
	DEAR:	Bit-mask of affected registers (as defined by RWBR)
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.22 Event[$B2] KOKINPROC_EVENT_BP_REGISTER_READ

This event triggers when a read from a general-purpose (Z80 architectural) register is attempted, and that register's breakpoint bit in the Register Read Breakpoint Register (RRBR) has been set. This event is used to implement register read breakpoints by setting the SUSPEND bit in this event's Event Handling Flags Register (EHFR), and when used in conjunction with the RRBR.

$B2	KOKINPROC_EVENT_BP_REGISTER_READ
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00B2
	DEAR:	Bit-mask of affected registers (as defined by RRBR)
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.23 Event[$B8] KOKINPROC_EVENT_BP_MEMORY_FETCH

This event triggers when an instruction fetch from memory is attempted and the 'Fetch Event' bit is set in the Memory Attribute Data Register (MADR) for any of the accessed memory addresses. This means that with a multi-byte instruction, the event can trigger on any of the bytes that make up the instruction. For example, if the 4-byte instruction BIT 0, (IX) is located at address $4000, then this event would trigger if the 'Fetch Event' bits were set for any combination of the addresses from $4000 through $4003.

$B8	KOKINPROC_EVENT_BP_MEMORY_FETCH
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00B8
	DEAR:	Target address (fetch address, current PC)
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.24 Event[$B9] KOKINPROC_EVENT_BP_MEMORY_WRITE

This event triggers when a memory write is attempted and the 'Write Event' bit is set in the Memory Attribute Data Register (MADR) for any of the accessed memory addresses. This means that with a multi-byte write the event can trigger on any of the addresses to be written to. For example, if a 2-byte write was attempted to $D000, then the event will trigger if the WRITE_EVENT bits were set for any combination of the addresses $D000 or D0001. The lowest (first) address with its 'Write Event' bit set will appear in the DEAR.

$B9	KOKINPROC_EVENT_BP_MEMORY_WRITE
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00B9
	DEAR:	Lowest memory address with WRITE_EVENT set in MADR
	DEDR:	Write data
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.25 Event[$BA] KOKINPROC_EVENT_BP_MEMORY_READ

This event triggers when a memory read is attempted and the 'Read Event' bit is set in the Memory Attribute Data Register (MADR) for any of the accessed memory addresses. This means that with a multi-byte read the event can trigger on any of the addresses to be read from. For example, if a 2-byte read was attempted to $D000, then the event will trigger if the READ_EVENT bits were set for any combination of the addresses $D000 or D0001. The lowest (first) address with its 'Read Event' bit set will appear in the DEAR.

$BA	KOKINPROC_EVENT_BP_MEMORY_READ
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00BA
	DEAR:	Lowest memory address with READ_EVENT set in MADR
	DEDR:	Undriven Bus Data ($FFFF)
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.26 Event[$BD] KOKINPROC_EVENT_BP_PORT_OUT

This event triggers when a port OUT is attempted and the 'Port Out Event' bit is set in the Port Attribute Data Register (PADR) for the accessed port.

$BD	KOKINPROC_EVENT_BP_PORT_OUT
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00BD
	DEAR:	Target Port
	DEDR:	Write data
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.3.27 Event[$BE] KOKINPROC_EVENT_BP_PORT_IN

This event triggers when a port IN is attempted and the 'Port In Event' bit is set in the Port Attribute Data Register (PADR) for the accessed port.

$BE	KOKINPROC_EVENT_BP_PORT_IN
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$00BE
	DEAR:	Target Port
	DEDR:	Undriven Bus Data ($FFFF)
	DEFR:	Current Event Handling Flags (EHFR) for this event

2.4 KokinPROC Power-On Self Test Codes

Message Code	Message Mnemonic	Description
$01	NO_HUB_FOUND	The KokinEXTD device requires access to a HUB device for correct operation. During POST the HUB device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$03	REGISTER_ERROR	During POST the KokinPROC device checks that reading and writing 8 and 16-bit values to and from the general-purpose registers (e.g., AF, BC, DE, HL) works correctly. This is necessary since the register implementation depends on aspects of the C++ language that are compiler-specific. This POST code should never occur in a release version of the Kokin DLL. It is only likely to occur in the event that the Kokin source code was recompiled by a third-party using a different C++ compiler.
$04	FLAG_ERROR	During POST the KokinPROC device checks that the symbolic definitions of certain flags in the flags register (F) are defined correctly. Though symbolic definitions are used throughout the source code when referring to the flags, certain instructions require the flags to be in certain bit positions to ease implementation or improve performance. If the proper symbolic flag definitions are not preserved then this POST code will be returned. This POST code should never occur in a release version of the Kokin DLL. It is only likely to occur in the event that the Kokin source code was recompiled by a third-party and the flag definitions were altered. This POST code is intended to be a final run-time warning indicating that the changes made to the flag definitions will affect correct operation.
$05	ISR_ERROR	During POST the KokinPROC device checks that the symbolic definitions of certain bits in the Interrupt Status Register (ISR) are defined correctly. Though symbolic definitions are used throughout the source code when referring to these bits, certain relationships amongst the bits must be preserved to simplify the implementation of the ISR. If the proper bit relationships are not preserved correctly then this POST code will be returned. This POST code should never occur in a release version of the Kokin DLL. It is only likely to occur in the event that the Kokin source code was recompiled by a third-party and the ISR bit definitions were altered. This POST code is intended to be a final run-time warning indicating that the changes made to the ISR definitions will affect correct operation.

Chapter 3: Hub (HUB) Devices

3.1 KokinMIOH Overview

3.2 KokinMIOH AGAMA Extension Registers

AGAMA Extension Register (AXR)	Register Name
AXR[$00]	Device ID Register (DIR)
AXR[$01]	Power-On Configuration Register (POCR)
AXR[$02]	Device Model Register (DMR)
AXR[$03]	Device Version Register (DVR)
AXR[$04]	Device Status Register (DSR)
AXR[$05]	AGAMA Reserved
AXR[$06]	AGAMA Reserved
AXR[$07]	AGAMA Reserved
AXR[$08]	Event Handling Code Register (EHCR)
AXR[$09]	Event Handling Flags Register (EHFR)
AXR[$0A]	Event Monitor Vector Register (EMVR)
AXR[$0B]	AGAMA Reserved
AXR[$0C]	Device Event Code Register (DECR)
AXR[$0D]	Device Event Address Register (DEAR)
AXR[$0E]	Device Event Data Register (DEDR)
AXR[$0F]	Device Event Flags Register (DEFR)
AXR[$10]	Device Event Flags Register (DSUR)
AXR[$11]	Reserved
AXR[$12]	Last Message Information Register (LMIR)
AXR[$13]	Last Message Data Register (LMDR)
AXR[$14]	Monitor Enter Code Register (MECR)
AXR[$15]	Monitor Enter Address Register (MEAR)
AXR[$16]	Monitor Enter Data Register (MEDR)
AXR[$17]	Monitor Enter Flags Register (MEFR)
AXR[$18]-AXR[$1F]	Reserved
AXR[$20]	Installed Devices Register (IDR)
AXR[$21]	Device Disable Register (DDR)
AXR[$22]	Peripheral Configuration Register (PCR)
AXR[$23]	Hub Configuration Register (HCR)
AXR[$24]-AXR[$FF]	Reserved

Table 3.2.a: KokinMIOH AGAMA Extension Registers

3.2.1 KokinMIOH AXR[$00]: Device ID Register (DIR)

The Device ID Register contains the 4-bit Device ID for the KokinMIOH device. The Device ID is assigned on Power-On and is used to address the KokinMIOH during certain types of bus transactions, such as AXR reads and writes.

DIR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	AGAMA Reserved				Device ID[3:0]

Table 3.2.1.a: Bit Fields of the Device ID Register (DIR)

Access: READ-ONLY

Bit Fields:
Device ID
The 4-bit Device ID for the device.

AGAMA Reserved
These bits are reserved for future expansion.

3.2.2 KokinMIOH AXR[$01]: Power-On Configuration Register (POCR)

The Power-On Configuration Register contains the initial configuration settings of the KokinMIOH device. The KokinMIOH device will sample all the configuration settings and save them in the POCR, but not all the settings are used. The bit field descriptions below indicate which Power-On Configuration settings are ignored by the KokinMIOH device.

POCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	POST Code				AGAMA Reserved		Monitor Mode	Suspended
Byte 0	GG Mode	Export Region	50Hz	AGAMA Reserved	SMS1 Bus	Lock Boot Device	Boot Device

Table 3.2.2.a: Bit Fields of the Power-On Configuration Register (POCR)

Access: READ-ONLY

Bit Fields:
POST Code
A 4-bit code indicating the result of the Power-On Self Test (POST) for the KokinMIOH device. A zero value indicates that the device passed POST. A non-zero value indicates a failure. A list of the KokinMIOH POST failure codes, along with detailed descriptions for each code, can be found in Appendix B: Power-On Self Test (POST) Code Summary

Monitor Mode
If this bit is set, the KokinMIOH device powered-on in Monitor Mode. Otherwise, the KokinMIOH device powered-on in Compatible Mode. Monitor mode is disabled in the current release of the Kokin Library, so this bit will always be reset (0).

Suspended
If this bit is set, the KokinMIOH device powered-on suspended. If not set, the KokinMIOH device powered-on resumed and immediately began responding to all bus transactions.

GG Mode
The KokinMIOH device ignores this bit in the current release of the Kokin Library.

Export Region
If this bit is set, the KokinMIOH device powered-on as an Export Region machine. Otherwise, the KokinMIOH device powered-on as a Japan Region machine. The KokinMIOH device uses the setting of this bit to determine whether the TH peripheral status bits should be inverted when they are read by software. (The TR peripheral status bits are unaffected by the region setting in the current KokinMIOH implementation.)

50Hz
The KokinMIOH ignores this bit.

SMS1 Bus
The KokinMIOH device uses this bit to correctly emulate the operation of a SMS1 Bus. A SMS1 Bus retains the previously driven data value. In contrast SMS2/GG busses return $FF if no data value is driven on the bus.

Lock Boot Device
The KokinMIOH device uses this bit to lock the specified boot device into addressable memory space. Setting this bit will prevent the specified boot device from being disabled and the other devices from being enabled in its place (via writes to the Device Disable Register (DDR)). Settings this bit will prevent boot devices from accidentally mapping themselves out of memory when memory address $C000 isn't properly initialized because no Boot ROM (BIOS) was run. (The commercial SMS ROM 'Golvellius' will do this.)

Boot Device
A 2-bit identifier indicating which memory device is initially mapped into the processor address space. See Table 3.1.2.b in section 3.1.2 [AXR01] Power-On Configuration Register (POCR) of the AGAMA Specification for the encodings of the Boot Device bits.

AGAMA Reserved
These bits are reserved for future expansion.

3.2.3 KokinMIOH AXR[$02]: Device Model Register (DMR)

The Device Model Register contains the KokinMIOH device's model number: A216. The 'A' indicates that the KokinMIOH is an AGAMA Device, and the '216' indicates compatiblity with the I/O controller used in some versions of the Sega Master System Model 1.

DMR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Model Number
Byte 0	Model Number

Table 3.2.3.a: Bit Fields of the Device Model Register (DMR)

Access: READ-ONLY

Bit Fields:
Model Number
The KokinMIOH device's model number. The current model number for this device is A216.

3.2.4 KokinMIOH AXR[$03]: Device Version Register (DVR)

The Device Version Register specifies the implementation version of the KokinMIOH device. Currently, the version number is 00.00 for all devices in the Kokin library.

DVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Major Version
Byte 0	Minor Version

Table 3.2.4.a: Bit Fields of the Device Version Register (DVR)

Access: READ-ONLY

Bit Fields:
Major Version
The major version number of the device implementation.

Minor Version:
The minor version number of the device implementation.

3.2.5 KokinMIOH AXR[$04]: Device Status Register (DSR)

The Device Status Register contains general information about the KokinMIOH device's current state.

DSR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent Set	Monitor Silent Set	Reserved		Device Enabled	Shutdown	Monitor Mode	Suspended
Byte 0	Reserved

Table 3.2.5.a: Bit Fields of the Device Status Register (DSR)

Access: READ-ONLY

Bit Fields:
Compatible Silent Set
A COMPATBILESILENT flag is set in one of the KokinMIOH device's EHFR registers. If this bit is set and the KokinMIOH device is in Compatible Mode when it receives a CLEARSILENTFLAGS message then the COMPATIBLESILENT and MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Monitor Silent Set
A MONITORSILENT flag is set if one of the KokinMIOH device's EHFR registers. If this bit is set and the device is in Monitor Mode when it receives a CLEARSILENTFLAGS message then the MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Device Enabled
Normally, this bit means the device is enabled. However, for the KokinMIOH device this bit takes on a slightly different meaning. If this bit is set, the KokinMIOH will respond to I/O port accesses in the range $C0 through $FF providing software with access to peripheral status (e.g., controller button presses). If this bit is disabled, the KokinMIOH will forward I/O requests in the $C0-$FF region to the other hub devices allowing those devices to use those I/O ports for various services. The FM Unit is an example of a device requiring this functionality so that its I/O ports can be accessed by software.

Shutdown
The KokinMIOH device has entered Shutdown. The KokinMIOH device will no longer respond to bus transactions, other than SYSMESSAGE transactions. A Power-On (Hard-Reset) is required to bring the KokinMIOH device and the rest of the system out of shutdown.

Monitor Mode
The KokinMIOH device is operating in Monitor Mode. All Monitor Mode functionality has been disabled in this release of the Kokin library, so this bit will always be reset (0).

Suspended
The KokinMIOH device has suspended. The device will still respond to bus traffic. This bit does not have much meaning for the KokinMIOH since it is a passive device and only responds to other devices' bus transactions.

Reserved
These bits are reserved for future expansion.

3.2.6 KokinMIOH AXR[$08]: Event Handling Code Register (EHCR)

The Event Handling Code Register is used to control the data appearing in the Event Handling Flags Register (EHFR). Together, the EHCR and EHFR control the access to the event flags that indicate how an event should be handled when it occurs. The event flags in the EHFR correspond to the event code in the EHCR. Writing a new event code to the EHCR will update the EHFR with that event's flags which can then be modified via the EHFR. The event codes for the KokinMIOH device can be found in Appendix C: Event Code Summary.

EHCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 3.2.6.a: Bit Fields of the Event Handling Code Register (EHCR)

3.2.7 KokinMIOH AXR[$09]: Event Handling Flags Register (EHFR)

EHFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 3.2.7.a: Bit Fields of the Event Handling Flags Register (EHFR)

Access: READ/WRITE

Bit Fields:
Compatible Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinMIOH device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinMIOH device receives a CLEARSILENTFLAGS message while in Compatible Mode, this bit (along with the Monitor Silent bit) is cleared for all 256 events. If the device is in Monitor Mode, this bit is not affected by a CLEARSILENTFLAGS message.

Monitor Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinMIOH device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinMIOH device receives a CLEARSILENTFLAGS message while in Monitor Mode, this bit is cleared for all 256 events.

Shutdown
Setting this bit indicates that the system should enter Shutdown mode when the event triggers. This flag is only examined if no other event handling flag is set (such as Monitor Mode or Suspend described below). Shutdown mode is used when an error or event occurs and no error recovery is possible. For example, if the KokinMIOH device encounters an unknown opcode the system may enter shutdown if no other event handling is specified. For Events and Event Handling for more information about shutdown and the different types of device events.

Monitor Mode
Setting this bit indicates that the system should enter Monitor Mode when the event triggers. This bit is read-only for all devices in this version of the Kokin Library.

Suspend
Setting this bit indicates that the system should suspend execution when the event triggers.

AGAMA Reserved
These bits are reserved for future expansion.

3.2.8 KokinMIOH AXR[$0A]: Event Monitor Vector Register (EMVR)

The Event Monitor Vector Register (EMVR) contains the address of the KokinMIOH device's Monitor Mode handler. When a device event triggers and the Monitor Mode event flag is set, the device will request that the system enter Monitor Mode and program flow will jump to the address specified in this register. Monitor mode is not available in the current release of the Kokin Library, so this register is not used, but it can be written to.

EMVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Monitor Vector Address[15:8]
Byte 0	Monitor Vector Address[7:0]

Table 3.2.8.a: Bit Fields of the Event Monitor Vector Register (EMVR)

Access: READ/WRITE

Bit Fields:
Monitor Vector Address
The address of the KokinMIOH device's Monitor Mode handler.

3.2.9 KokinMIOH AXR[$0C]: Device Event Code Register (DECR)

DECR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 3.2.9.a: Bit Fields of the Device Event Code Register (DECR)

Access: READ-ONLY

Bit Fields:
Event Code
The 8-bit event code for the last triggered event.

AGAMA Reserved
These bits are reserved for future expansion.

3.2.10 KokinMIOH AXR[$0D]: Device Event Address Register (DEAR)

DEAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Address[15:8]
Byte 0	Event-specific Address[7:0]

Table 3.2.10.a: Bit Fields of the Device Event Address Register (DEAR)

3.2.11 KokinMIOH AXR[$0E]: Device Event Data Register (DEDR)

DEDR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Data[15:8]
Byte 0	Event-specific Data[7:0]

Table 3.2.11.a: Bit Fields of the Device Event Data Register (DEDR)

3.2.12 KokinMIOH AXR[$0F]: Device Event Flags Register (DEFR)

DEFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 3.2.12.a: Bit Fields of the Device Event Flags Register (DEFR)

Access: READ-ONLY

Bit Fields:
Compatible Silent
The Compatible Silent flag is set for the triggered event. The next time this event occurs while the KokinMIOH device is in Compatible Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Silent
The Monitor Silent flag is set for the triggered event. The next time this event occurs while the KokinMIOH device is in Monitor Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Shutdown
The Shutdown flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Shutdown mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Mode
The Monitor Mode flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Monitor Mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Suspend
The Suspend flag is set for the triggered event, indicating that one possible mechanism for handling the event was to suspend execution. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

AGAMA Reserved
These bits are reserved for future expansion.

3.2.13 KokinMIOH AXR[$10]: Device State Update Register (DSUR)

This register is not implemented in this version of KokinMIOH.

3.2.14 KokinMIOH AXR[$12]: Last Message Information Register (LMIR)

The Last Message Information Register contains information about the most recent message broadcast to all system devices by the KokinMIOH.

MCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Device ID
Byte 0	Message Code

Table 3.2.14.a: Bit Fields of the KokinMIOH's Last Message Information Register (LMIR)

Access: READ-ONLY

Bit Fields:
Device ID
The ID of the device responsible for the last system message.

Message Code
The messages code number. See Appendix D: System Message Code Summary for a list of all message codes.

3.2.15 KokinMIOH AXR[$13]: Last Message Data Register (LMDR)

The Last Message Data Register contains specific to the most recent message broadcast to all system devices by the KokinMIOH.

MCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Data[15:8]
Byte 0	Data[7:0]

Table 3.2.15.a: Bit Fields of the KokinMIOH's Last Message Data Register (LMDR)

Access: READ-ONLY

Bit Fields:
Data
Data specific to the last system message.

3.2.16 KokinMIOH AXR[$14]: Monitor Event Code Register (MECR)

This register is not implemented in this version of KokinMIOH.

3.2.17 KokinMIOH AXR[$15]: Monitor Event Address Register (MEAR)

This register is not implemented in this version of KokinMIOH.

3.2.18 KokinMIOH AXR[$16]: Monitor Event Data Register (MEDR)

This register is not implemented in this version of KokinMIOH.

3.2.19 KokinMIOH AXR[$17]: Monitor Event Flags Register (MEFR)

This register is not implemented in this version of KokinMIOH.

3.2.20 KokinMIOH AXR[$20]: Installed Devices Register (IDR)

The Installed Devices Register contains a bit mask indicating which device IDs are associated with installed devices.

IDR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	ID $0F	ID $0E	ID $0D	ID $0C	ID $0B	ID $0A	ID $09	ID $08
Byte 0	ID $07	ID $06	ID $05	ID $04	ID $03	ID $02	ID $01	ID $00

Table 3.2.20.a: Bit Fields of the KokinMIOH's Installed Devices Register (IDR)

Access: READ-ONLY

Bit Fields:
ID $0F
This bit is set if a device using ID $0F is installed.

ID $0E
This bit is set if a device using ID $0E is installed.

ID $0D
This bit is set if a device using ID $0D is installed.

ID $0C
This bit is set if a device using ID $0C is installed.

ID $0B
This bit is set if a device using ID $0B is installed.

ID $0A
This bit is set if a device using ID $0A is installed.

ID $09
This bit is set if a device using ID $09 is installed.

ID $08
This bit is set if a device using ID $08 is installed.

ID $07
This bit is set if a device using ID $07 is installed.

ID $06
This bit is set if a device using ID $06 is installed.

ID $05
This bit is set if a device using ID $05 is installed.

ID $04
This bit is set if a device using ID $04 is installed.

ID $03
This bit is set if a device using ID $03 is installed.

ID $02
This bit is set if a device using ID $02 is installed.

ID $01
This bit is set if a device using ID $01 is installed.

ID $00
This bit is set if a device using ID $00 is installed.

3.2.21 KokinMIOH AXR[$21]: Device Disable Register (DDR)

This register specifies which devices in the system should be disabled. The low-order byte contains the last data written to I/O port $3E.

IDR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved					FMU	PSG	VDP
Byte 0	EXT1	EXT0	CARD	SRAM	BROM	HUB	Reserved

Table 3.2.21.a: Bit Fields of the KokinMIOH's Device Disable Register (IDR)

Access: READ-ONLY

Bit Fields:
FMU
Set this bit to disable the FMU device. This bit is read is READ-ONLY in this version of the KokinMIOH

PSG
Set this bit to disable the PSG device. This bit is read is always forced to be RESET in this version of the KokinMIOH

PSG
Set this bit to disable the VDP device. This bit is read is always forced to be RESET in this version of the KokinMIOH

EXT1
Set this bit to disable the EXT1 device.

EXT0
Set this bit to disable the EXT0 device.

CARD
Set this bit to disable the CARD device.

SRAM
Set this bit to disable the SRAM device.

BROM
Set this bit to disable the BROM device.

HUB
Set this bit to prevent the HUB device from intercepting I/O accesses in the $C0-$FF region (the peripheral port I/O ports).

Reserved
These bits are reserved for future expansion

3.2.22 KokinMIOH AXR[$22]: Peripheral Configurationion Register (PCR)

The Peripheral Configuration Register contains the last data byte written to port $3F. This register is only partially implemented in this version of MesaDX and is Read-Only.

PCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Port $3F Data

Table 3.2.22.a: Bit Fields of the MIOH's Peripheral Configuration Register (PCR)

Access: READ-ONLY

Bit Fields:
Port $3F Data
Most recent data byte written to port $3F.
Reserved
These bits are reserved for future expansion.

3.2.23 KokinMIOH AXR[$23]: Hub Configuration Register (HCR)

The Hub Configuration Register contains information about configuring the Hub services.

MCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Reserved				Enable Reset	Enable Pause	Enable Peripheral Port 1	Peripheral Port 0

Table 3.2.23.a: Bit Fields of the KokinMIOH's Hub Configuration Register (HCR)

Access: READ-ONLY

Bit Fields:
Enable Reset
Set this bit to enable the system's Reset button

Enable Pause
Set this bit to enable the system's Pause button

Enable Peripheral Port 1
Set this bit to enable peripheral port 1. This bit is permanently RESET and read-only in this version of the KokinMIOH.

Enable Peripheral Port 0
Set this bit to enable peripheral port 0.

Reserved
These bits are reserved for future expansion.

3.3 KokinMIOH Events

Event Code	Event Mnemonic
$00 - $03	AGAMA Reserved
$04	KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR
$05	KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR_BIT
$06	KOKINMIOH_EVENT_CP_WRITE_RESERVED_AXR
$07	KOKINMIOH_EVENT_CP_READ_READONLY_AXR
$08 - $0F	AGAMA Reserved
$10 - $FF	Reserved

Table 3.3.a: KokinMIOH Events

3.3.1 Event[$04] KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$04]	KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0004
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

3.3.2 Event[$05] KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR_BIT

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$05]	KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR_BIT
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0005
	DEAR:	Index of the destination AXR
	DEDR:	A bit-mask of the affected read-only bits
	DEFR:	Current Event Handling Flags (EHFR) for this event

3.3.3 Event[$06] KOKINMIOH_EVENT_CP_WRITE_RESERVED_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$06]	KOKINMIOH_EVENT_CP_WRITE_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0006
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

3.3.4 Event[$07] KOKINMIOH_EVENT_CP_READ_RESERVED_AXR

This event triggers when a read from a reserved AGAMA Extension Register (AXR) is attempted. Since the AXR is reserved noread data is returned. A value of 0 is placed in the DEDR.

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINMIOH_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$07]	KOKINMIOH_EVENT_CP_READ_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0007
	DEAR:	Index of the destination AXR
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

3.4 KokinMIOH Power-On Self Test Codes

Message Code	Message Mnemonic	Description
$02	NO_PROC_FOUND	The KokinMIOH device requires access to a PROC device for correct operation. During POST the PROC device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$03	NO_BROM_FOUND	The KokinMIOH device requires access to a BROM device for correct operation. In the event that the user does not require a true BROM device to be installed, a 'dummy' device must be installed in its place. During POST the BROM device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$04	NO_SRAM_FOUND	The KokinMIOH device requires access to a SRAM device for correct operation. In the event that the user does not require a true SRAM device to be installed, a 'dummy' device must be installed in its place. During POST the SRAM device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$05	NO_CARD_FOUND	The KokinMIOH device requires access to a CARD device for correct operation. In the event that the user does not require a true CARD device to be installed, a 'dummy' device must be installed in its place. During POST the CARD device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$06	NO_EXT0_FOUND	The KokinMIOH device requires access to a EXT0 device for correct operation. In the event that the user does not require a true EXT0 device to be installed, a 'dummy' device must be installed in its place. During POST the EXT0 device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$07	NO_EXT1_FOUND	The KokinMIOH device requires access to a EXT0 device for correct operation. In the event that the user does not require a true EXT0 device to be installed, a 'dummy' device must be installed in its place. During POST the EXT1 device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$08	NO_VDP_FOUND	The KokinMIOH device requires access to a VDP device for correct operation. In the event that the user does not require a true VDP device to be installed, a 'dummy' device must be installed in its place. During POST the VDP device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$09	NO_PSG_FOUND	The KokinMIOH device requires access to a PSG device for correct operation. In the event that the user does not require a true PSG device to be installed, a 'dummy' device must be installed in its place. During POST the PSG device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$0A	NO_FMU_FOUND	The KokinMIOH device requires access to a FMU device for correct operation. In the event that the user does not require a true FMU device to be installed, a 'dummy' device must be installed in its place. During POST the FMU device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$0F	NO_EXTD_FOUND	The KokinMIOH device requires access to a EXTD device for correct operation. In the event that the user does not require a true EXTD device to be installed, a 'dummy' device must be installed in its place. During POST the EXTD device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.

Chapter 4: System RAM (SRAM) Devices

4.1 KokinSRAM Overview

4.2 KokinSRAM AGAMA Extension Registers

AGAMA Extension Register (AXR)	Register Name
AXR[$00]	Device ID Register (DIR)
AXR[$01]	Power-On Configuration Register (POCR)
AXR[$02]	Device Model Register (DMR)
AXR[$03]	Device Version Register (DVR)
AXR[$04]	Device Status Register (DSR)
AXR[$05]	AGAMA Reserved
AXR[$06]	AGAMA Reserved
AXR[$07]	AGAMA Reserved
AXR[$08]	Event Handling Code Register (EHCR)
AXR[$09]	Event Handling Flags Register (EHFR)
AXR[$0A]	Event Monitor Vector Register (EMVR)
AXR[$0B]	AGAMA Reserved
AXR[$0C]	Device Event Code Register (DECR)
AXR[$0D]	Device Event Address Register (DEAR)
AXR[$0E]	Device Event Data Register (DEDR)
AXR[$0F]	Device Event Flags Register (DEFR)
AXR[$10]	Device Event Flags Register (DSUR)
AXR[$11]-AXR[$2F]	Reserved
AXR[$30]	Memory Attribute Register (MAR)
AXR[$21]-AXR[$FF]	Reserved

Table 4.2.a: KokinSRAM AGAMA Extension Registers

4.2.1 KokinSRAM AXR[$00]: Device ID Register (DIR)

The Device ID Register contains the 4-bit Device ID for the KokinSRAM device. The Device ID is assigned on Power-On and is used to address the KokinSRAM during certain types of bus transactions, such as AXR reads and writes.

DIR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	AGAMA Reserved				Device ID[3:0]

Table 4.2.1.a: Bit Fields of the Device ID Register (DIR)

Access: READ-ONLY

Bit Fields:
Device ID
The 4-bit Device ID for the device.

AGAMA Reserved
These bits are reserved for future expansion.

4.2.2 KokinSRAM AXR[$01]: Power-On Configuration Register (POCR)

The Power-On Configuration Register contains the initial configuration settings of the KokinSRAM device. The KokinSRAM device will sample all the configuration settings and save them in the POCR, but not all the settings are used. The bit field descriptions below indicate which Power-On Configuration settings are ignored by the KokinSRAM device.

POCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	POST Code				AGAMA Reserved		Monitor Mode	Suspended
Byte 0	GG Mode	Export Region	50Hz	AGAMA Reserved	SMS1 Bus	Lock Boot Device	Boot Device

Table 4.2.2.a: Bit Fields of the Power-On Configuration Register (POCR)

Access: READ-ONLY

Bit Fields:
POST Code
A 4-bit code indicating the result of the Power-On Self Test (POST) for the KokinSRAM device. A zero value indicates that the device passed POST. A non-zero value indicates a failure. A list of the KokinSRAM POST failure codes, along with detailed descriptions for each code, can be found in Appendix B: Power-On Self Test (POST) Code Summary

Monitor Mode
If this bit is set, the KokinSRAM device powered-on in Monitor Mode. Otherwise, the KokinSRAM device powered-on in Compatible Mode. Monitor mode is disabled in the current release of the Kokin Library, so this bit will always be reset (0).

Suspended
If this bit is set, the KokinSRAM device powered-on suspended. If not set, the KokinSRAM device powered-on resumed and immediately began responding to all bus transactions.

GG Mode
The KokinSRAM device ignores this bit since its operation is independent of the SMS or GG operating modes.

Export Region
The KokinSRAM device ignores this bit since its operation is independent of the region setting of the machine.

50Hz
The KokinSRAM device ignores this bit.

SMS1 Bus
The KokinSRAM device ignores this bit.

Lock Boot Device
The KokinSRAM device ignores this bit.

Boot Device
The KokinSRAM device ignores these bits since its operation is independent of the initial boot device.

AGAMA Reserved
These bits are reserved for future expansion.

4.2.3 KokinSRAM AXR[$02]: Device Model Register (DMR)

The Device Model Register contains the KokinSRAM device's model number: A008. The 'A' indicates that the KokinSRAM is an AGAMA Device, and the '008' indicates this device contains 8KBytes of RAM.

DMR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Model Number
Byte 0	Model Number

Table 4.2.3.a: Bit Fields of the Device Model Register (DMR)

Access: READ-ONLY

Bit Fields:
Model Number
The KokinSRAM device's model number. The current model number for this device is A008.

4.2.4 KokinSRAM AXR[$03]: Device Version Register (DVR)

The Device Version Register specifies the implementation version of the KokinSRAM device. Currently, the version number is 00.00 for all devices in the Kokin library.

DVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Major Version
Byte 0	Minor Version

Table 4.2.4.a: Bit Fields of the Device Version Register (DVR)

Access: READ-ONLY

Bit Fields:
Major Version
The major version number of the device implementation.

Minor Version:
The minor version number of the device implementation.

4.2.5 KokinSRAM AXR[$04]: Device Status Register (DSR)

The Device Status Register contains general information about the KokinSRAM device's current state.

DSR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent Set	Monitor Silent Set	Reserved		Device Enabled	Shutdown	Monitor Mode	Suspended
Byte 0	Reserved

Table 4.2.5.a: Bit Fields of the Device Status Register (DSR)

Access: READ-ONLY

Bit Fields:
Compatible Silent Set
A COMPATBILESILENT flag is set in one of the KokinSRAM device's EHFR registers. If this bit is set and the KokinSRAM device is in Compatible Mode when it receives a CLEARSILENTFLAGS message then the COMPATIBLESILENT and MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Monitor Silent Set
A MONITORSILENT flag is set if one of the KokinSRAM device's EHFR registers. If this bit is set and the device is in Monitor Mode when it receives a CLEARSILENTFLAGS message then the MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Device Enabled
The KokinSRAM device is enabled. This bit is always set in this version of the KokinSRAM implementation.

Shutdown
The KokinSRAM device has entered Shutdown. The KokinSRAM device will no longer respond to bus transactions, other than SYSMESSAGE transactions. A Power-On (Hard-Reset) is required to bring the KokinMIOH device and the rest of the system out of shutdown.

Monitor Mode
The KokinSRAM device is operating in Monitor Mode. All Monitor Mode functionality has been disabled in this release of the Kokin library, so this bit will always be reset (0).

Suspended
The KokinSRAM device has suspended. The device will still respond to bus traffic. This bit does not have much meaning for the KokinSRAM since it is a passive device and only responds to bus transactions from the KokinMIOH device.

Reserved
These bits are reserved for future expansion.

4.2.6 KokinSRAM AXR[$08]: Event Handling Code Register (EHCR)

The Event Handling Code Register is used to control the data appearing in the Event Handling Flags Register (EHFR). Together, the EHCR and EHFR control the access to the event flags that indicate how an event should be handled when it occurs. The event flags in the EHFR correspond to the event code in the EHCR. Writing a new event code to the EHCR will update the EHFR with that event's flags which can then be modified via the EHFR. The event codes for the KokinSRAM device can be found in Appendix C: Event Code Summary.

EHCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 4.2.6.a: Bit Fields of the Event Handling Code Register (EHCR)

4.2.7 KokinSRAM AXR[$09]: Event Handling Flags Register (EHFR)

EHFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 4.2.7.a: Bit Fields of the Event Handling Flags Register (EHFR)

Access: READ/WRITE

Bit Fields:
Compatible Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinSRAM device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinSRAM device receives a CLEARSILENTFLAGS message while in Compatible Mode, this bit (along with the Monitor Silent bit) is cleared for all 256 events. If the device is in Monitor Mode, this bit is not affected by a CLEARSILENTFLAGS message.

Monitor Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinSRAM device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinSRAM device receives a CLEARSILENTFLAGS message while in Monitor Mode, this bit is cleared for all 256 events.

Shutdown
Setting this bit indicates that the system should enter Shutdown mode when the event triggers. This flag is only examined if no other event handling flag is set (such as Monitor Mode or Suspend described below). Shutdown mode is used when an error or event occurs and no error recovery is possible. For example, if the KokinSRAM device encounters an unknown opcode the system may enter shutdown if no other event handling is specified. For Events and Event Handling for more information about shutdown and the different types of device events.

Monitor Mode
Setting this bit indicates that the system should enter Monitor Mode when the event triggers. This bit is read-only for all devices in this version of the Kokin Library.

Suspend
Setting this bit indicates that the system should suspend execution when the event triggers.

AGAMA Reserved
These bits are reserved for future expansion.

4.2.8 KokinSRAM AXR[$0A]: Event Monitor Vector Register (EMVR)

The Event Monitor Vector Register (EMVR) contains the address of the KokinSRAM device's Monitor Mode handler. When a device event triggers and the Monitor Mode event flag is set, the device will request that the system enter Monitor Mode and program flow will jump to the address specified in this register. Monitor mode is not available in the current release of the Kokin Library, so this register is not used, but it can be written to.

EMVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Monitor Vector Address[15:8]
Byte 0	Monitor Vector Address[7:0]

Table 4.2.8.a: Bit Fields of the Event Monitor Vector Register (EMVR)

Access: READ/WRITE

Bit Fields:
Monitor Vector Address
The address of the KokinSRAM device's Monitor Mode handler.

4.2.9 KokinSRAM AXR[$0C]: Device Event Code Register (DECR)

DECR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 4.2.9.a: Bit Fields of the Device Event Code Register (DECR)

Access: READ-ONLY

Bit Fields:
Event Code
The 8-bit event code for the last triggered event.

AGAMA Reserved
These bits are reserved for future expansion.

4.2.10 KokinSRAM AXR[$0D]: Device Event Address Register (DEAR)

DEAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Address[15:8]
Byte 0	Event-specific Address[7:0]

Table 4.2.10.a: Bit Fields of the Device Event Address Register (DEAR)

4.2.11 KokinSRAM AXR[$0E]: Device Event Data Register (DEDR)

DEDR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Data[15:8]
Byte 0	Event-specific Data[7:0]

Table 4.2.11.a: Bit Fields of the Device Event Data Register (DEDR)

4.2.12 KokinSRAM AXR[$0F]: Device Event Flags Register (DEFR)

DEFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 4.2.12.a: Bit Fields of the Device Event Flags Register (DEFR)

Access: READ-ONLY

Bit Fields:
Compatible Silent
The Compatible Silent flag is set for the triggered event. The next time this event occurs while the KokinSRAM device is in Compatible Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Silent
The Monitor Silent flag is set for the triggered event. The next time this event occurs while the KokinSRAM device is in Monitor Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Shutdown
The Shutdown flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Shutdown mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Mode
The Monitor Mode flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Monitor Mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Suspend
The Suspend flag is set for the triggered event, indicating that one possible mechanism for handling the event was to suspend execution. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

AGAMA Reserved
These bits are reserved for future expansion.

4.2.13 KokinSRAM AXR[$10]: KokinSRAM Device State Update Register (DSUR)

This register is not implemented in this version of KokinSRAM.

4.2.14 KokinSRAM AXR[$30]: Memory Attribute Register (MAR)

The Memory Attribute Register (MAR) is used to protect different regions of memory against certain types of memory accesses. The KokinSRAM device responds to memory accesses in the range $C000 through $FFFF. As defined by the SM3A the region from $C000 through $DFFF is considered normal work RAM space, while $E000 through $FFFF (high RAM or HRAM) is a mirror image of that space. The MAR allows setting different protection types for each of these ranges. The MAR can be used to protect each of these regions against read, write, or fetch accesses or against any combination thereof.

If a memory access to a protected region is attempted then a KOKINSRAM_EVENT_PT_MEMORY_FETCH , KOKINSRAM_EVENT_PT_MEMORY_WRITE , or KOKINSRAM_EVENT_PT_MEMORY_READ , protection event may trigger (depending on the type of access and whether or not the event has been silenced). The KokinSRAM device will respond differently to the access request depending on whether an event triggers or not. If an event triggers (the event was not silenced) the KokinSRAM device will respond indicating that an internal event must be handled (protection events are always handled since they always have at least one handling flag set in the EHFR: the SHUTDOWN flag). If an event does not trigger (because its silent flag is set), the KokinSRAM device will ignore the memory request and not respond at all, just as if the device was disabled. In either case, the memory transfer is dropped: no data, either to or from memory, will be transferred. (Please see the Events and Event Handling section in the AGAMA Specification for more information about protection events.)

MAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Reserved	HRAM Read Protect	HRAM Write Protect	HRAM Fetch Protect	Reserved	RAM Read Protect	RAM Write Protect	RAM Fetch Protect

Table 4.2.14.a: Bit Fields of the Memory Attribute Register (MAR)

Access: READ/WRITE

Bit Fields:
HRAM Read Protect
Setting this bit will protect the region $E000 through $FFFF (High RAM) from read accesses. If this bit is set and a read in this range is attempted, then a KOKINSRAM_EVENT_PT_MEMORY_READ event triggers (unless it has been silenced). The read request is ignored, and no data is returned. Setting this bit may be useful for detecting errant accesses to High RAM. These accesses could be converted to main RAM accesses since High RAM is just a mirror of main RAM.

HRAM Write Protect
Setting this bit will protect the region $E000 through $FFFF (High RAM) from write accesses. If this bit is set and a write in this range is attempted, then a KOKINSRAM_EVENT_PT_MEMORY_WRITE event triggers (unless it has been silenced). The write request is ignored, and no data is written (memory will be not be modified). Setting this bit may be useful for detecting errant accesses to High RAM. These accesses could be converted to main RAM accesses since High RAM is just a mirror of main RAM.

HRAM Fetch Protect
Setting this bit will protect the region $E000 through $FFFF (High RAM) from code fetches. If this bit is set and a code fetch in this range is attempted, then a KOKINSRAM_EVENT_PT_MEMORY_FETCH event triggers (unless it has been silenced). The code fetch request is ignored, and no data is returned. Setting this bit may be useful for detecting errant accesses to High RAM. These accesses could be converted to main RAM accesses since High RAM is just a mirror of main RAM.

RAM Read Protect
Setting this bit will protect the region $C000 through $DFFF from read accesses. If this bit is set and a read in this range is attempted, then a KOKINSRAM_EVENT_PT_MEMORY_READ event triggers (unless it has been silenced). The read request is ignored, and no data is returned.

RAM Write Protect
Setting this bit will protect the region $C000 through $DFFF from write accesses. If this bit is set and a write in this range is attempted, then a KOKINSRAM_EVENT_PT_MEMORY_WRITE event triggers (unless it has been silenced). The write request is ignored, and no data is written (memory will not be modified).

RAM Fetch Protect
Setting this bit will protect the region $C000 through $DFFF from code fetches. If this bit is set and a code fetch in this range is attempted, then a KOKINSRAM_EVENT_PT_MEMORY_FETCH event triggers (unless it has been silenced). The code fetch request is ignored, and no data is returned.

Reserved
These bits are reserved for future expansion.

4.3 KokinSRAM Events

Event Code	Event Mnemonic
$00 - $03	AGAMA Reserved
$04	KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR
$05	KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT
$06	KOKINSRAM_EVENT_CP_WRITE_RESERVED_AXR
$07	KOKINSRAM_EVENT_CP_READ_READONLY_AXR
$08 - $0F	AGAMA Reserved
$10 - $47	Reserved
$48	KOKINSRAM_EVENT_PT_MEMORY_FETCH
$49	KOKINSRAM_EVENT_PT_MEMORY_WRITE
$4A	KOKINSRAM_EVENT_PT_MEMORY_READ
$4B - $FF	Reserved

Table 4.3.a: KokinSRAM Events

4.3.1 Event[$04] KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$04]	KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0004
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

4.3.2 Event[$05] KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$05]	KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0005
	DEAR:	Index of the destination AXR
	DEDR:	A bit-mask of the affected read-only bits
	DEFR:	Current Event Handling Flags (EHFR) for this event

4.3.3 Event[$06] KOKINSRAM_EVENT_CP_WRITE_RESERVED_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$06]	KOKINSRAM_EVENT_CP_WRITE_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0006
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

4.3.4 Event[$07] KOKINSRAM_EVENT_CP_READ_RESERVED_AXR

This event triggers when a read from a reserved AGAMA Extension Register (AXR) is attempted. Since the AXR is reserved noread data is returned. A value of 0 is placed in the DEDR.

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$07]	KOKINSRAM_EVENT_CP_READ_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0007
	DEAR:	Index of the destination AXR
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

4.3.5 Event[$48] KOKINSRAM_EVENT_PT_MEMORY_FETCH

This event triggers when a code fetch from a code fetch-protected region of memory is attempted. Code fetch protection is defined in the Memory Attribute Register (MAR). The code fetch will be ignored, and no data returned.

This is a protection event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Attempting to reset the SHUTDOWN flag in the EHFR will trigger a KOKINSRAM_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a protection event, it can be silenced but it will not be silenced by default. If the user wishes to silence a protection event, the silent flags must be set manually or via Monitor software (the Monitor Mode handling flag must be set in the EHFR for this event in order to enter Monitor Mode). However, the silent flags will be RESET automatically when the current instruction retires. Note that simply silencing a protection event will not allow the desired access to proceed. Silencing just prevents the event from triggering again during the current instruction. To allow the access to proceed, the protection on that type of access must be removed.

Event[$48]	KOKINSRAM_EVENT_PT_MEMORY_FETCH
Type	PROTECTION
Default Action	SHUTDOWN
Silent Flags	No change, but can be manually SET by user or Monitor Code. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0048
	DEAR:	Address of memory access with code fetch protection enabled.
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

4.3.6 Event[$49] KOKINSRAM_EVENT_PT_MEMORY_WRITE

This event triggers when a memory write to a write-protected region of memory is attempted. Memory write protection is defined in the Memory Attribute Register (MAR). The memory write will be ignored, and no data will be updated. The write data will be placed in the DEDR.

Event[$49]	KOKINSRAM_EVENT_PT_MEMORY_WRITE
Type	PROTECTION
Default Action	SHUTDOWN
Silent Flags	No change, but can be manually SET by user or Monitor Code. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0049
	DEAR:	Address of memory access with write protection enabled.
	DEDR:	Intended write data
	DEFR:	Current Event Handling Flags (EHFR) for this event

4.3.7 Event[$4A] KOKINSRAM_EVENT_PT_MEMORY_READ

This event triggers when a memory read from a read-protected region of memory is attempted. Memory read protection is defined in the Memory Attribute Register (MAR). The memory read will be ignored, and no data will be returned.

Event[$4A]	KOKINSRAM_EVENT_PT_MEMORY_READ
Type	PROTECTION
Default Action	SHUTDOWN
Silent Flags	No change, but can be manually SET by user or Monitor Code. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$004A
	DEAR:	Address of memory access with read protection enabled.
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

4.4 KokinSRAM Power-On Self Test Codes

Message Code	Message Mnemonic	Description
$01	NO_HUB_FOUND	The KokinSRAM device requires access to a HUB device for correct operation. During POST the HUB device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.

Chapter 5: Sega Card and Cartridge (CARD, EXT0, BROM) Devices

5.1 KokinCARD: A Sega CARD Compatible Device

The KokinCARD device can be installed as a CARD or EXT0 device. See Chapter 3: AGAMA Devices for more information about specific device types.

5.1.1 KokinCARD AGAMA Extension Registers

AGAMA Extension Register (AXR)	Register Name
AXR[$00]	Device ID Register (DIR)
AXR[$01]	Power-On Configuration Register (POCR)
AXR[$02]	Device Model Register (DMR)
AXR[$03]	Device Version Register (DVR)
AXR[$04]	Device Status Register (DSR)
AXR[$05]	AGAMA Reserved
AXR[$06]	AGAMA Reserved
AXR[$07]	AGAMA Reserved
AXR[$08]	Event Handling Code Register (EHCR)
AXR[$09]	Event Handling Flags Register (EHFR)
AXR[$0A]	Event Monitor Vector Register (EMVR)
AXR[$0B]	AGAMA Reserved
AXR[$0C]	Device Event Code Register (DECR)
AXR[$0D]	Device Event Address Register (DEAR)
AXR[$0E]	Device Event Data Register (DEDR)
AXR[$0F]	Device Event Flags Register (DEFR)
AXR[$10]	Device Event Flags Register (DSUR)
AXR[$11]-AXR[$2F]	Reserved
AXR[$30]	Memory Attribute Register (MAR)
AXR[$31]-AXR[$FF]	Reserved

Table 5.1.1.a: KokinCARD AGAMA Extension Registers

5.1.1.1 KokinCARD AXR[$00]: Device ID Register (DIR)

The Device ID Register contains the 4-bit Device ID for the KokinCARD device. The Device ID is assigned on Power-On and is used to address the KokinCARD during certain types of bus transactions, such as AXR reads and writes.

DIR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	AGAMA Reserved				Device ID[3:0]

Table 5.1.1.1.a: Bit Fields of the Device ID Register (DIR)

Access: READ-ONLY

Bit Fields:
Device ID
The 4-bit Device ID for the device.

AGAMA Reserved
These bits are reserved for future expansion.

5.1.1.2 KokinCARD AXR[$01]: Power-On Configuration Register (POCR)

The Power-On Configuration Register contains the initial configuration settings of the KokinCARD device. The KokinCARD device will sample all the configuration settings and save them in the POCR, but not all the settings are used. The bit field descriptions below indicate which Power-On Configuration settings are ignored by the KokinCARD device.

POCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	POST Code				AGAMA Reserved		Monitor Mode	Suspended
Byte 0	GG Mode	Export Region	50Hz	AGAMA Reserved	SMS1 Bus	Lock Boot Device	Boot Device

Table 5.1.1.2.a: Bit Fields of the Power-On Configuration Register (POCR)

Access: READ-ONLY

Bit Fields:
POST Code
A 4-bit code indicating the result of the Power-On Self Test (POST) for the KokinCARD device. A zero value indicates that the device passed POST. A non-zero value indicates a failure. A list of the KokinCARD POST failure codes, along with detailed descriptions for each code, can be found in Appendix B: Power-On Self Test (POST) Code Summary

Monitor Mode
If this bit is set, the KokinCARD device powered-on in Monitor Mode. Otherwise, the KokinCARD device powered-on in Compatible Mode. Monitor mode is disabled in the current release of the Kokin Library, so this bit will always be reset (0).

Suspended
If this bit is set, the KokinCARD device powered-on suspended. If not set, the KokinCARD device powered-on resumed and immediately began responding to all bus transactions.

GG Mode
The KokinCARD device ignores this bit since its operation is independent of the SMS or GG operating modes.

Export Region
The KokinCARD device ignores this bit since its operation is independent of the region setting of the machine.

50Hz
The KokinCARD device ignores this bit.

SMS1 Bus
The KokinCARD device ignores this bit.

Lock Boot Device
The KokinCARD device ignores this bit.

Boot Device
The KokinCARD device ignores these bits since its operation is independent of the initial boot device.

AGAMA Reserved
These bits are reserved for future expansion.

5.1.1.3 KokinCARD AXR[$02]: Device Model Register (DMR)

The Device Model Register contains the KokinCARD device's model number: A032. The 'A' indicates that the KokinCARD is an AGAMA Device, and the '032' indicates this device contains 32KBytes of ROM.

DMR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Model Number
Byte 0	Model Number

Table 5.1.1.3.a: Bit Fields of the Device Model Register (DMR)

Access: READ-ONLY

Bit Fields:
Model Number
The KokinCARD device's model number. The current model number for this device is A032.

5.1.1.4 KokinCARD AXR[$03]: Device Version Register (DVR)

The Device Version Register specifies the implementation version of the KokinCARD device. Currently, the version number is 00.00 for all devices in the Kokin library.

DVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Major Version
Byte 0	Minor Version

Table 5.1.1.4.a: Bit Fields of the Device Version Register (DVR)

Access: READ-ONLY

Bit Fields:
Major Version
The major version number of the device implementation.

Minor Version:
The minor version number of the device implementation.

5.1.1.5 KokinCARD AXR[$04]: Device Status Register (DSR)

The Device Status Register contains general information about the KokinCARD device's current state.

DSR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent Set	Monitor Silent Set	Reserved		Device Enabled	Shutdown	Monitor Mode	Suspended
Byte 0	Reserved

Table 5.1.1.5.a: Bit Fields of the Device Status Register (DSR)

Access: READ-ONLY

Bit Fields:
Compatible Silent Set
A COMPATBILESILENT flag is set in one of the KokinCARD device's EHFR registers. If this bit is set and the KokinCARD device is in Compatible Mode when it receives a CLEARSILENTFLAGS message then the COMPATIBLESILENT and MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Monitor Silent Set
A MONITORSILENT flag is set if one of the KokinCARD device's EHFR registers. If this bit is set and the device is in Monitor Mode when it receives a CLEARSILENTFLAGS message then the MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Device Enabled
The KokinCARD device is enabled. This bit is always set in this version of the KokinCARD implementation.

Shutdown
The KokinCARD device has entered Shutdown. The KokinCARD device will no longer respond to bus transactions, other than SYSMESSAGE transactions. A Power-On (Hard-Reset) is required to bring the KokinMIOH device and the rest of the system out of shutdown.

Monitor Mode
The KokinCARD device is operating in Monitor Mode. All Monitor Mode functionality has been disabled in this release of the Kokin library, so this bit will always be reset (0).

Suspended
The KokinCARD device has suspended. The device will still respond to bus traffic. This bit does not have much meaning for the KokinSRAM since it is a passive device and only responds to bus transactions from the KokinMIOH device.

Reserved
These bits are reserved for future expansion.

5.1.1.6 KokinCARD AXR[$08]: Event Handling Code Register (EHCR)

The Event Handling Code Register is used to control the data appearing in the Event Handling Flags Register (EHFR). Together, the EHCR and EHFR control the access to the event flags that indicate how an event should be handled when it occurs. The event flags in the EHFR correspond to the event code in the EHCR. Writing a new event code to the EHCR will update the EHFR with that event's flags which can then be modified via the EHFR. The event codes for the KokinCARD device can be found in Appendix C: Event Code Summary.

EHCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 5.1.1.6.a: Bit Fields of the Event Handling Code Register (EHCR)

5.1.1.7 KokinCARD AXR[$09]: Event Handling Flags Register (EHFR)

EHFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 5.1.1.7.a: Bit Fields of the Event Handling Flags Register (EHFR)

Access: READ/WRITE

Bit Fields:
Compatible Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinCARD device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinCARD device receives a CLEARSILENTFLAGS message while in Compatible Mode, this bit (along with the Monitor Silent bit) is cleared for all 256 events. If the device is in Monitor Mode, this bit is not affected by a CLEARSILENTFLAGS message.

Monitor Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinCARD device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinCARD device receives a CLEARSILENTFLAGS message while in Monitor Mode, this bit is cleared for all 256 events.

Shutdown
Setting this bit indicates that the system should enter Shutdown mode when the event triggers. This flag is only examined if no other event handling flag is set (such as Monitor Mode or Suspend described below). Shutdown mode is used when an error or event occurs and no error recovery is possible. For example, if the KokinCARD device encounters an unknown opcode the system may enter shutdown if no other event handling is specified. For Events and Event Handling for more information about shutdown and the different types of device events.

Monitor Mode
Setting this bit indicates that the system should enter Monitor Mode when the event triggers. This bit is read-only for all devices in this version of the Kokin Library.

Suspend
Setting this bit indicates that the system should suspend execution when the event triggers.

AGAMA Reserved
These bits are reserved for future expansion.

5.1.1.8 KokinCARD AXR[$0A]: Event Monitor Vector Register (EMVR)

The Event Monitor Vector Register (EMVR) contains the address of the KokinCARD device's Monitor Mode handler. When a device event triggers and the Monitor Mode event flag is set, the device will request that the system enter Monitor Mode and program flow will jump to the address specified in this register. Monitor mode is not available in the current release of the Kokin Library, so this register is not used, but it can be written to.

EMVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Monitor Vector Address[15:8]
Byte 0	Monitor Vector Address[7:0]

Table 5.1.1.8.a: Bit Fields of the Event Monitor Vector Register (EMVR)

Access: READ/WRITE

Bit Fields:
Monitor Vector Address
The address of the KokinCARD device's Monitor Mode handler.

5.1.1.9 KokinCARD AXR[$0C]: Device Event Code Register (DECR)

DECR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 5.1.1.9.a: Bit Fields of the Device Event Code Register (DECR)

Access: READ-ONLY

Bit Fields:
Event Code
The 8-bit event code for the last triggered event.

AGAMA Reserved
These bits are reserved for future expansion.

5.1.1.10 KokinCARD AXR[$0D]: Device Event Address Register (DEAR)

DEAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Address[15:8]
Byte 0	Event-specific Address[7:0]

Table 5.1.1.10.a: Bit Fields of the Device Event Address Register (DEAR)

5.1.1.11 KokinCARD AXR[$0E]: Device Event Data Register (DEDR)

DEDR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Data[15:8]
Byte 0	Event-specific Data[7:0]

Table 5.1.1.11.a: Bit Fields of the Device Event Data Register (DEDR)

5.1.1.12 KokinCARD AXR[$0F]: Device Event Flags Register (DEFR)

DEFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 5.1.1.12.a: Bit Fields of the Device Event Flags Register (DEFR)

Access: READ-ONLY

Bit Fields:
Compatible Silent
The Compatible Silent flag is set for the triggered event. The next time this event occurs while the KokinCARD device is in Compatible Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Silent
The Monitor Silent flag is set for the triggered event. The next time this event occurs while the KokinCARD device is in Monitor Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Shutdown
The Shutdown flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Shutdown mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Mode
The Monitor Mode flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Monitor Mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Suspend
The Suspend flag is set for the triggered event, indicating that one possible mechanism for handling the event was to suspend execution. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

AGAMA Reserved
These bits are reserved for future expansion.

5.1.1.13 KokinCARD AXR[$10]: Device State Update Register (DSUR)

This register is not implemented in this version of KokinCARD.

5.1.1.14 KokinCARD AXR[$30]: Memory Attribute Register (MAR)

The Memory Attribute Register (MAR) is used to protect different regions of memory against certain types of memory accesses. The KokinCARD device responds to memory accesses in the range $0000 through $BFFF. This area is broken into 3 separate 16KB Page Frames, starting at $0000, $4000 and $8000, respectively. The MAR allows setting different protection types for each of these page frames. The MAR can be used to protect each of these regions against read, write, or fetch accesses or against any combination thereof.

If a memory access to a protected region is attempted then a KOKINCARD_EVENT_PT_MEMORY_FETCH , KOKINCARD_EVENT_PT_MEMORY_WRITE , or KOKINCARD_EVENT_PT_MEMORY_READ , protection event may trigger (depending on the type of access and whether or not the event has been silenced). The KokinCARD device will respond differently to the access request depending on whether an event triggers or not. If an event triggers (the event was not silenced) the KokinCARD device will respond indicating that an internal event must be handled (protection events are always handled since they always have at least one handling flag set in the EHFR: the SHUTDOWN flag). If an event does not trigger (because its silent flag is set), the KokinCARD device will ignore the memory request and not respond at all, just as if the device was disabled. In either case, the memory transfer is dropped: no data, either to or from memory, will be transferred. (Please see the Events and Event Handling section in the AGAMA Specification for more information about protection events.)

MAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved					Frame 2 Read Protect	Frame 2 Write Protect	Frame 2 Fetch Protect
Byte 0	Reserved	Frame 1 Read Protect	Frame 1 Write Protect	Frame 1 Fetch Protect	Reserved	Frame 0 Read Protect	Frame 0 Write Protect	Frame 0 Fetch Protect

Table 5.1.1.14.a: Bit Fields of the Memory Attribute Register (MAR)

Access: READ/WRITE

Bit Fields:
Frame 2 Read Protect
Setting this bit will protect the region $8000 through $BFFF (Page Frame 2) from read accesses. If this bit is set and a read in this range is attempted, then a KOKINCARD_EVENT_PT_MEMORY_READ event triggers (unless it has been silenced). The read request is ignored, and no data is returned.

Frame 2 Write Protect
Setting this bit will protect the region $8000 through $BFFF (Page Frame 2) from write accesses. If this bit is set and a write in this range is attempted, then a KOKINCARD_EVENT_PT_MEMORY_WRITE event triggers (unless it has been silenced). The write request is ignored, and no data is written (memory will not be modified).

Frame 2 Fetch Protect
Setting this bit will protect the region $8000 through $BFFF (Page Frame 2) from code fetches. If this bit is set and a code fetch in this range is attempted, then a KOKINCARD_EVENT_PT_MEMORY_FETCH event triggers (unless it has been silenced). The code fetch request is ignored, and no data is returned.

Frame 1 Read Protect
Setting this bit will protect the region $4000 through $7FFF (Page Frame 1) from read accesses. If this bit is set and a read in this range is attempted, then a KOKINCARD_EVENT_PT_MEMORY_READ event triggers (unless it has been silenced). The read request is ignored, and no data is returned.

Frame 1 Write Protect
Setting this bit will protect the region $4000 through $7FFF (Page Frame 1) from write accesses. If this bit is set and a write in this range is attempted, then a KOKINCARD_EVENT_PT_MEMORY_WRITE event triggers (unless it has been silenced). The write request is ignored, and no data is written (memory will not be modified).

Frame 1 Fetch Protect
Setting this bit will protect the region $4000 through $7FFF (Page Frame 1) from code fetches. If this bit is set and a code fetch in this range is attempted, then a KOKINCARD_EVENT_PT_MEMORY_FETCH event triggers (unless it has been silenced). The code fetch request is ignored, and no data is returned.

Frame 0 Read Protect
Setting this bit will protect the region $0000 through $3FFF (Page Frame 0) from read accesses. If this bit is set and a read in this range is attempted, then a KOKINCARD_EVENT_PT_MEMORY_READ event triggers (unless it has been silenced). The read request is ignored, and no data is returned.

Frame 0 Write Protect
Setting this bit will protect the region $0000 through $3FFF (Page Frame 0) from write accesses. If this bit is set and a write in this range is attempted, then a KOKINCARD_EVENT_PT_MEMORY_WRITE event triggers (unless it has been silenced). The write request is ignored, and no data is written (memory will not be modified).

Frame 0 Fetch Protect
Setting this bit will protect the region $0000 through $3FFF (Page Frame 0) from code fetches. If this bit is set and a code fetch in this range is attempted, then a KOKINCARD_EVENT_PT_MEMORY_FETCH event triggers (unless it has been silenced). The code fetch request is ignored, and no data is returned.

Reserved
These bits are reserved for future expansion.

5.1.2 KokinCARD Events

Event Code	Event Mnemonic
$00 - $03	AGAMA Reserved
$04	KOKINCARD_EVENT_CP_WRITE_READONLY_AXR
$05	KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT
$06	KOKINCARD_EVENT_CP_WRITE_RESERVED_AXR
$07	KOKINCARD_EVENT_CP_READ_READONLY_AXR
$08 - $0F	AGAMA Reserved
$10 - $47	Reserved
$48	KOKINCARD_EVENT_PT_MEMORY_FETCH
$49	KOKINCARD_EVENT_PT_MEMORY_WRITE
$4A	KOKINCARD_EVENT_PT_MEMORY_READ
$4B - $FF	Reserved

Table 5.1.2.a: KokinCARD Events

5.1.2.1 Event[$04] KOKINCARD_EVENT_CP_WRITE_READONLY_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$04]	KOKINCARD_EVENT_CP_WRITE_READONLY_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0004
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.1.2.2 Event[$05] KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$05]	KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0005
	DEAR:	Index of the destination AXR
	DEDR:	A bit-mask of the affected read-only bits
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.1.2.3 Event[$06] KOKINCARD_EVENT_CP_WRITE_RESERVED_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$06]	KOKINSRAM_EVENT_CP_WRITE_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0006
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.1.2.4 Event[$07] KOKINCARD_EVENT_CP_READ_RESERVED_AXR

This event triggers when a read from a reserved AGAMA Extension Register (AXR) is attempted. Since the AXR is reserved noread data is returned. A value of 0 is placed in the DEDR.

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$07]	KOKINSRAM_EVENT_CP_READ_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0007
	DEAR:	Index of the destination AXR
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.1.2.5 Event[$48] KOKINCARD_EVENT_PT_MEMORY_FETCH

This is a protection event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Attempting to reset the SHUTDOWN flag in the EHFR will trigger a KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a protection event, it can be silenced but it will not be silenced by default. If the user wishes to silence a protection event, the silent flags must be set manually or via Monitor software (the Monitor Mode handling flag must be set in the EHFR for this event in order to enter Monitor Mode). However, the silent flags will be RESET automatically when the current instruction retires. Note that simply silencing a protection event will not allow the desired access to proceed. Silencing just prevents the event from triggering again during the current instruction. To allow the access to proceed, the protection on that type of access must be removed.

Event[$48]	KOKINCARD_EVENT_PT_MEMORY_FETCH
Type	PROTECTION
Default Action	SHUTDOWN
Silent Flags	No change, but can be manually SET by user or Monitor Code. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0048
	DEAR:	Address of memory access with code fetch protection enabled.
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.1.2.6 Event[$49] KOKINCARD_EVENT_PT_MEMORY_WRITE

This is a protection event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Attempting to reset the SHUTDOWN flag in the EHFR will trigger a KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a protection event, it can be silenced but it will not be silenced by default. If the user wishes to silence a protection event, the silent flags must be set manually or via Monitor software (the Monitor Mode handling flag must be set in the EHFR for this event in order to enter Monitor Mode). However, the silent flags will be RESET automatically when the current instruction retires. Note that simply silencing a protection event will not allow the desired access to proceed. Silencing just prevents the event from triggering again during the current instruction. To allow the access to proceed, the protection on that type of access must be removed.

Event[$49]	KOKINCARD_EVENT_PT_MEMORY_WRITE
Type	PROTECTION
Default Action	SHUTDOWN
Silent Flags	No change, but can be manually SET by user or Monitor Code. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0049
	DEAR:	Address of memory access with write protection enabled.
	DEDR:	Intended write data
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.1.2.7 Event[$4A] KOKINCARD_EVENT_PT_MEMORY_READ

This is a protection event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Attempting to reset the SHUTDOWN flag in the EHFR will trigger a KOKINCARD_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a protection event, it can be silenced but it will not be silenced by default. If the user wishes to silence a protection event, the silent flags must be set manually or via Monitor software (the Monitor Mode handling flag must be set in the EHFR for this event in order to enter Monitor Mode). However, the silent flags will be RESET automatically when the current instruction retires. Note that simply silencing a protection event will not allow the desired access to proceed. Silencing just prevents the event from triggering again during the current instruction. To allow the access to proceed, the protection on that type of access must be removed.

Event[$4A]	KOKINSRAM_EVENT_PT_MEMORY_READ
Type	PROTECTION
Default Action	SHUTDOWN
Silent Flags	No change, but can be manually SET by user or Monitor Code. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$004A
	DEAR:	Address of memory access with read protection enabled.
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.1.3 KokinCARD Power-On Self Test Codes

Message Code	Message Mnemonic	Description
$01	NO_HUB_FOUND	The KokinCARD device requires access to a HUB device for correct operation. During POST the HUB device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$01	ROM_ERROR	The KokinCARD device supports either 1 or 2 16KB pages of ROM data. This POST code will be returned under the following conditions: 1.) No ROM data was provided to the KokinCARD device at power-on. (If no ROM data is required, than the KokinCARD device should not have been installed.) 2.) More than 2 16KB pages of ROM data were provided, or 3.) A non-integral number of 16KB pages of ROM data was provided. This POST code is most likely the result of using the wrong ROM image with the KokinCARD device.

5.2 KokinCART_A235: A 315-5235 Compatible Mapper

The KokinCART_A235 device can be installed as a BROM or EXT0 device. See Chapter 3: AGAMA Devices for more information about specific device types.

5.2.1 KokinCART_A235 AGAMA Extension Registers

AGAMA Extension Register (AXR)	Register Name
AXR[$00]	Device ID Register (DIR)
AXR[$01]	Power-On Configuration Register (POCR)
AXR[$02]	Device Model Register (DMR)
AXR[$03]	Device Version Register (DVR)
AXR[$04]	Device Status Register (DSR)
AXR[$05]	AGAMA Reserved
AXR[$06]	AGAMA Reserved
AXR[$07]	AGAMA Reserved
AXR[$08]	Event Handling Code Register (EHCR)
AXR[$09]	Event Handling Flags Register (EHFR)
AXR[$0A]	Event Monitor Vector Register (EMVR)
AXR[$0B]	AGAMA Reserved
AXR[$0C]	Device Event Code Register (DECR)
AXR[$0D]	Device Event Address Register (DEAR)
AXR[$0E]	Device Event Data Register (DEDR)
AXR[$0F]	Device Event Flags Register (DEFR)
AXR[$10]	Device Event Flags Register (DSUR)
AXR[$11]-AXR[$1F]	Reserved
AXR[$20]	Page Count Register (PCR)
AXR[$21]	Page Frame Configuration Register (PFCR)
AXR[$22]-AXR[$2F]	Reserved
AXR[$30]	Memory Attribute Register (MAR)
AXR[$31]-AXR[$FB]	Reserved
AXR[$FC]	Backup RAM Configuration Register (BRCR)
AXR[$FD]	Page Frame 0 Register (PF0R)
AXR[$FE]	Page Frame 1 Register (PF1R)
AXR[$FF]	Page Frame 2 Register (PF2R)

Table 5.2.1.a: KokinCART_A235 AGAMA Extension Registers

5.2.1.1 KokinCART_A235 AXR[$00]: Device ID Register (DIR)

The Device ID Register contains the 4-bit Device ID for the KokinCART_A235 device. The Device ID is assigned on Power-On and is used to address the KokinCART_A235 during certain types of bus transactions, such as AXR reads and writes.

DIR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	AGAMA Reserved				Device ID[3:0]

Table 5.2.1.1.a: Bit Fields of the Device ID Register (DIR)

Access: READ-ONLY

Bit Fields:
Device ID
The 4-bit Device ID for the device.

AGAMA Reserved
These bits are reserved for future expansion.

5.2.1.2 KokinCART_A235 AXR[$01]: Power-On Configuration Register (POCR)

The Power-On Configuration Register contains the initial configuration settings of the KokinCART_A235 device. The KokinCART_A235 device will sample all the configuration settings and save them in the POCR, but not all the settings are used. The bit field descriptions below indicate which Power-On Configuration settings are ignored by the KokinCART_A235 device.

POCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	POST Code				AGAMA Reserved		Monitor Mode	Suspended
Byte 0	GG Mode	Export Region	50Hz	AGAMA Reserved	SMS1 Bus	Lock Boot Device	Boot Device

Table 5.2.1.2.a: Bit Fields of the Power-On Configuration Register (POCR)

Access: READ-ONLY

Bit Fields:
POST Code
A 4-bit code indicating the result of the Power-On Self Test (POST) for the KokinCART_A235 device. A zero value indicates that the device passed POST. A non-zero value indicates a failure. A list of the KokinCART_A235 POST failure codes, along with detailed descriptions for each code, can be found in Appendix B: Power-On Self Test (POST) Code Summary

Monitor Mode
If this bit is set, the KokinCART_A235 device powered-on in Monitor Mode. Otherwise, the KokinCART_A235 device powered-on in Compatible Mode. Monitor mode is disabled in the current release of the Kokin Library, so this bit will always be reset (0).

Suspended
If this bit is set, the KokinCART_A235 device powered-on suspended. If not set, the KokinCART_A235 device powered-on resumed and immediately began responding to all bus transactions.

GG Mode
The KokinCART_A235 device ignores this bit since its operation is independent of the SMS or GG operating modes.

Export Region
The KokinCART_A235 device ignores this bit since its operation is independent of the region setting of the machine.

50Hz
The KokinCART_A235 device ignores this bit.

SMS1 Bus
The KokinCART_A235 device ignores this bit.

Lock Boot Device
The KokinCART_A235 device ignores this bit.

Boot Device
The KokinCART_A235 device ignores these bits since its operation is independent of the initial boot device.

AGAMA Reserved
These bits are reserved for future expansion.

5.2.1.3 KokinCART_A235 AXR[$02]: Device Model Register (DMR)

The Device Model Register contains the KokinCART_A235 device's model number: A235. The 'A' indicates that the KokinCART_A235 is an AGAMA Device, and the '235' indicates this device has functionality similar to the Sega 315-5235 mapper chip used in many cartridges. The 315-5235 is a generic mapper, and almost all commercial SMS software (excluding codemasters software) is compatible with this mapper.

DMR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Model Number
Byte 0	Model Number

Table 5.2.1.3.a: Bit Fields of the Device Model Register (DMR)

Access: READ-ONLY

Bit Fields:
Model Number
The KokinCART_A235 device's model number. The current model number for this device is A235.

5.2.1.4 KokinCART_A235 AXR[$03]: Device Version Register (DVR)

The Device Version Register specifies the implementation version of the KokinCART_A235 device. Currently, the version number is 00.00 for all devices in the Kokin library.

DVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Major Version
Byte 0	Minor Version

Table 5.2.1.4.a: Bit Fields of the Device Version Register (DVR)

Access: READ-ONLY

Bit Fields:
Major Version
The major version number of the device implementation.

Minor Version:
The minor version number of the device implementation.

5.2.1.5 KokinCART_A235 AXR[$04]: Device Status Register (DSR)

The Device Status Register contains general information about the KokinCART_A235 device's current state.

DSR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent Set	Monitor Silent Set	Reserved		Device Enabled	Shutdown	Monitor Mode	Suspended
Byte 0	Reserved						BRAM Accessed	BRAM Present

Table 5.2.1.5.a: Bit Fields of the Device Status Register (DSR)

Access: READ-ONLY

Bit Fields:
Compatible Silent Set
A COMPATBILESILENT flag is set in one of the KokinCART_A235 device's EHFR registers. If this bit is set and the KokinCART_A235 device is in Compatible Mode when it receives a CLEARSILENTFLAGS message then the COMPATIBLESILENT and MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Monitor Silent Set
A MONITORSILENT flag is set if one of the KokinCART_A235 device's EHFR registers. If this bit is set and the device is in Monitor Mode when it receives a CLEARSILENTFLAGS message then the MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Device Enabled
The KokinCART_A235 device is enabled. This bit is always set in this version of the KokinCART_A235 implementation.

Shutdown
The KokinCART_A235 device has entered Shutdown. The KokinCART_A235 device will no longer respond to bus transactions, other than SYSMESSAGE transactions. A Power-On (Hard-Reset) is required to bring the KokinMIOH device and the rest of the system out of shutdown.

Monitor Mode
The KokinCART_A235 device is operating in Monitor Mode. All Monitor Mode functionality has been disabled in this release of the Kokin library, so this bit will always be reset (0).

Suspended
The KokinCART_A235 device has suspended. The device will still respond to bus traffic. This bit does not have much meaning for the KokinCART_A235 since it is a passive device and only responds to bus transactions from the KokinMIOH device.

BRAM Accessed
This bit will be set if ever the 'Enable BRAM' bit is set in the Backup RAM Configuration Register (BRCR). 'BRAM Accessed' indicates that at some point software wanted to use BRAM. This bit does not imply that a read or write to BRAM occurred, just that BRAM was enabled at somepoint. This bit is a "sticky bit", and once it is set it will remain set until the next Power-On (Hard Reset).

BRAM Present
This bit is set if one or more pages of RAM are installed in in the KokinCART_A235 device. If set, this bit indicates that RAM is present and can be accessed by appropriate setting data in the Backup RAM Configuration Register (BRCR). (Currently, MesaDX always supplies 2 RAM pages to the KokinCART_A235 device, so this bit will always be set.)

Reserved
These bits are reserved for future expansion.

5.2.1.6 KokinCART_A235 AXR[$08]: Event Handling Code Register (EHCR)

The Event Handling Code Register is used to control the data appearing in the Event Handling Flags Register (EHFR). Together, the EHCR and EHFR control the access to the event flags that indicate how an event should be handled when it occurs. The event flags in the EHFR correspond to the event code in the EHCR. Writing a new event code to the EHCR will update the EHFR with that event's flags which can then be modified via the EHFR. The event codes for the KokinCART_A235 device can be found in Appendix C: Event Code Summary.

EHCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 5.2.1.6.a: Bit Fields of the Event Handling Code Register (EHCR)

5.2.1.7 KokinCART_A235 AXR[$09]: Event Handling Flags Register (EHFR)

EHFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 5.2.1.7.a: Bit Fields of the Event Handling Flags Register (EHFR)

Access: READ/WRITE

Bit Fields:
Compatible Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinCART_A235 device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinCART_A235 device receives a CLEARSILENTFLAGS message while in Compatible Mode, this bit (along with the Monitor Silent bit) is cleared for all 256 events. If the device is in Monitor Mode, this bit is not affected by a CLEARSILENTFLAGS message.

Monitor Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinCART_A235 device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinCART_A235 device receives a CLEARSILENTFLAGS message while in Monitor Mode, this bit is cleared for all 256 events.

Shutdown
Setting this bit indicates that the system should enter Shutdown mode when the event triggers. This flag is only examined if no other event handling flag is set (such as Monitor Mode or Suspend described below). Shutdown mode is used when an error or event occurs and no error recovery is possible. For example, if the KokinCART_A235 device encounters an unknown opcode the system may enter shutdown if no other event handling is specified. For Events and Event Handling for more information about shutdown and the different types of device events.

Monitor Mode
Setting this bit indicates that the system should enter Monitor Mode when the event triggers. This bit is read-only for all devices in this version of the Kokin Library.

Suspend
Setting this bit indicates that the system should suspend execution when the event triggers.

AGAMA Reserved
These bits are reserved for future expansion.

5.2.1.8 KokinCART_A235 AXR[$0A]: Event Monitor Vector Register (EMVR)

The Event Monitor Vector Register (EMVR) contains the address of the KokinCART_A235 device's Monitor Mode handler. When a device event triggers and the Monitor Mode event flag is set, the device will request that the system enter Monitor Mode and program flow will jump to the address specified in this register. Monitor mode is not available in the current release of the Kokin Library, so this register is not used, but it can be written to.

EMVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Monitor Vector Address[15:8]
Byte 0	Monitor Vector Address[7:0]

Table 5.2.1.8.a: Bit Fields of the Event Monitor Vector Register (EMVR)

Access: READ/WRITE

Bit Fields:
Monitor Vector Address
The address of the KokinCART_A235 device's Monitor Mode handler.

5.2.1.9 KokinCART_A235 AXR[$0C]: Device Event Code Register (DECR)

DECR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 5.2.1.9.a: Bit Fields of the Device Event Code Register (DECR)

Access: READ-ONLY

Bit Fields:
Event Code
The 8-bit event code for the last triggered event.

AGAMA Reserved
These bits are reserved for future expansion.

5.2.1.10 KokinCART_A235 AXR[$0D]: Device Event Address Register (DEAR)

DEAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Address[15:8]
Byte 0	Event-specific Address[7:0]

Table 5.2.1.10.a: Bit Fields of the Device Event Address Register (DEAR)

5.2.1.11 KokinCART_A235 AXR[$0E]: Device Event Data Register (DEDR)

DEDR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Data[15:8]
Byte 0	Event-specific Data[7:0]

Table 5.2.1.11.a: Bit Fields of the Device Event Data Register (DEDR)

5.2.1.12 KokinCART_A235 AXR[$0F]: Device Event Flags Register (DEFR)

DEFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 5.2.1.12.a: Bit Fields of the Device Event Flags Register (DEFR)

Access: READ-ONLY

Bit Fields:
Compatible Silent
The Compatible Silent flag is set for the triggered event. The next time this event occurs while the KokinCART_A235 device is in Compatible Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Silent
The Monitor Silent flag is set for the triggered event. The next time this event occurs while the KokinCART_A235 device is in Monitor Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Shutdown
The Shutdown flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Shutdown mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Mode
The Monitor Mode flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Monitor Mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Suspend
The Suspend flag is set for the triggered event, indicating that one possible mechanism for handling the event was to suspend execution. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

AGAMA Reserved
These bits are reserved for future expansion.

5.2.1.13 KokinCART_A235 AXR[$10]: Device State Update Register (DSUR)

This register is not implemented in this version of KokinCART_A235.

5.2.1.14 KokinCART_A235 AXR[$20]: Page Count Register (PCR)

The Page Count Register indicates the number of ROM and RAM pages installed in the device.

PCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	RAM Page Count
Byte 0	ROM Page Count

Table 5.2.1.14.a: Bit Fields of the Page Count Register (PCR)

Access: READ-ONLY

Bit Fields:
RAM Page Count
The number of RAM pages installed (each page is 16KB). The KokinCART_A235 device supports up to 2 RAM pages.

ROM Page Count
The number of ROM pages installed (each page is 16KB). The KokinCART_A235 device supports up to 256 ROM pages. This value is used to ensure that only pages that are physically present can be mapped into page frame when a Page Frame Register (PFR) is written. The page that gets mapped is the Page Frame Register data modulo the ROM page count. For example, if there are 16 ROM pages, but 17 is written to a Page Frame Register, then page number 1 gets mapped into the page frame. Note, though, that 17 will still appear as the PFR value. The modulo operation does not modify the data written to the PFR, it only limits the mapping of pages to physically existing pages. This behavior is necessary as a lot of commercial software will set the high bit of the PFR writes. This would lead to a non-existent page being loaded if the range check wasn't performed. This behavior only applies to PF0R, PF1R and PF2R. It does not affect BRCR writes.

5.2.1.15 KokinCART_A235 AXR[$21]: Page Frame Configuration Register (PFCR)

The Page Frame Configuration Register can be used to enable or disable the paging mechanism for the page frames within the KokinCART_A235 memory range. If a page swap is attempted in a page frame where paging has been disabled, then a KOKINA235_EVENT_PT_PAGINGDISABLED protection event may trigger (depending on whether or not the event has been silenced). The KokinCART_A235 device will respond differently to the paging request depending on whether the event triggers or not. If the event triggers (the event was not silenced) the KokinCART_A235 device will respond indicating that an internal event must be handled (protection events are always handled since they always have at least one handling flag set in the EHFR: the SHUTDOWN flag). If the event does not trigger (because its silent flag is set), the KokinCART_A235 device will ignore the paging request and not resopnd at all, just as if the device was disabled. In either case, no page swap will occur. The original page will remain in the given page frame.

PFCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Reserved			Fix First 1K	Enable Backup RAM Paging	Enable Page Frame 2 Paging	Enable Page Frame 1 Paging	Enable Page Frame 0 Paging

Table 5.2.1.15.a: Bit Fields of the Page Frame Configuration Register (PFCR)

Access: READ-ONLY

Bit Fields:
Fix First 1K
Set this bit to keep the first 1K of ROM ($0000 - $0400) permanently mapped into the first 1K of address space. This bit prevents that 1K from being swapped out when a new page is mapped into page frame 0.

Enable Backup RAM
Paging
Set this bit to enable paging of Backup RAM pages in the page frame covering the range $8000 to $BFFF (page frame 2). This bit only covers paging for Backup RAM pages in page frame 2 (See the Backup Ram configuration Register (BRCR) description for details on mapping backup RAM pages into page frame 2). For normal ROM pages, use the Enable Page Frame 2 Paging' bit to control paging for page frame 2.

Enable Page Frame 2
Paging
Set this bit to enable paging in the page frame covering the range $8000 to $BFFF (page frame 2). This bit covers paging for normal ROM pages in page frame 2. If Backup RAM is enabled for Frame 2 (see the Backup Ram configuration Register (BRCR) for details), then the 'Enable Backup RAM Paging' bit must be used to control paging in page frame 2.

Enable Page Frame 1
Paging
Set this bit to enable paging in the page frame covering the range $4000 to $7FFF (page frame 1).

Enable Page Frame 0
Paging
Set this bit to enable paging in the page frame covering the range $0000 to $3FFF (page frame 0).

Reserved
These bits are reserved for future expansion.

5.2.1.16 KokinCART_A235 AXR[$30]: Memory Attribute Register (MAR)

The Memory Attribute Register (MAR) is used to protect different regions of memory against certain types of memory accesses. The KokinCART_A235 device responds to memory accesses in the range $0000 through $BFFF. This area is broken into 3 separate 16KB Page Frames, starting at $0000, $4000 and $8000, respectively. The MAR allows setting different protection types for each of these page frames. The MAR can be used to protect each of these regions against read, write, or fetch accesses or against any combination thereof.

If a memory access to a protected region is attempted then a KOKINA235_EVENT_PT_MEMORY_FETCH , KOKINA235_EVENT_PT_MEMORY_WRITE , or KOKINA235_EVENT_PT_MEMORY_READ , protection event may trigger (depending on the type of access and whether or not the event has been silenced). The KokinCART_A235 device will respond differently to the access request depending on whether an event triggers or not. If an event triggers (the event was not silenced) the KokinCART_A235 device will respond indicating that an internal event must be handled (protection events are always handled since they always have at least one handling flag set in the EHFR: the SHUTDOWN flag). If an event does not trigger (because its silent flag is set), the KokinCART_A235 device will ignore the memory request and not respond at all, just as if the device was disabled. In either case, the memory transfer is dropped: no data, either to or from memory, will be transferred. (Please see the Events and Event Handling section in the AGAMA Specification for more information about protection events.)

MAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved	Backup RAM Read Protect	Backup RAM Write Protect	Backup RAM Fetch Protect	Reserved	Frame 2 Read Protect	Frame 2 Write Protect	Frame 2 Fetch Protect
Byte 0	Reserved	Frame 1 Read Protect	Frame 1 Write Protect	Frame 1 Fetch Protect	Reserved	Frame 0 Read Protect	Frame 0 Write Protect	Frame 0 Fetch Protect

Table 5.2.1.16.a: Bit Fields of the Memory Attribute Register (MAR)

Access: READ/WRITE

Bit Fields:
Backup RAM Read Protect
Setting this bit will protect the region $8000 through $BFFF (Page Frame 2) from read accesses when Backup RAM is enabled via the Backup RAM Configuration Register (BRCR). If this bit is set and a read in this range is attempted while BRAM is enabled, then a KOKINA235_EVENT_PT_MEMORY_READ event triggers (unless it has been silenced). The read request is ignored, and no data is returned.

Backup RAM Write Protect
Setting this bit will protect the region $8000 through $BFFF (Page Frame 2) from read accesses when Backup RAM is enabled via the Backup RAM Configuration Register (BRCR). If this bit is set and a write in this range is attempted while BRAM is enabled, then a KOKINA235_EVENT_PT_MEMORY_WRITE event triggers (unless it has been silenced). The write request is ignored, and no data is written (memory will not be modified).

Backup RAM Fetch Protect
Setting this bit will protect the region $8000 through $BFFF (Page Frame 2) from code fetches when Backup RAM is enabled via the Backup RAM Configuration Register (BRCR). If this bit is set and a code fetch in this range is attempted while BRAM is enabled, then a KOKINA235_EVENT_PT_MEMORY_FETCH event triggers (unless it has been silenced). The code fetch request is ignored, and no data is returned.

Frame 2 Read Protect
Setting this bit will protect the region $8000 through $BFFF (Page Frame 2) from read accesses. If this bit is set and a read in this range is attempted, then a KOKINA235_EVENT_PT_MEMORY_READ event triggers (unless it has been silenced). The read request is ignored, and no data is returned.

Frame 2 Write Protect
Setting this bit will protect the region $8000 through $BFFF (Page Frame 2) from write accesses. If this bit is set and a write in this range is attempted, then a KOKINA235_EVENT_PT_MEMORY_WRITE event triggers (unless it has been silenced). The write request is ignored, and no data is written (memory will not be modified).

Frame 2 Fetch Protect
Setting this bit will protect the region $8000 through $BFFF (Page Frame 2) from code fetches. If this bit is set and a code fetch in this range is attempted, then a KOKINA235_EVENT_PT_MEMORY_FETCH event triggers (unless it has been silenced). The code fetch request is ignored, and no data is returned.

Frame 1 Read Protect
Setting this bit will protect the region $4000 through $7FFF (Page Frame 1) from read accesses. If this bit is set and a read in this range is attempted, then a KOKINA235_EVENT_PT_MEMORY_READ event triggers (unless it has been silenced). The read request is ignored, and no data is returned.

Frame 1 Write Protect
Setting this bit will protect the region $4000 through $7FFF (Page Frame 1) from write accesses. If this bit is set and a write in this range is attempted, then a KOKINA235_EVENT_PT_MEMORY_WRITE event triggers (unless it has been silenced). The write request is ignored, and no data is written (memory will not be modified).

Frame 1 Fetch Protect
Setting this bit will protect the region $4000 through $7FFF (Page Frame 1) from code fetches. If this bit is set and a code fetch in this range is attempted, then a KOKINA235_EVENT_PT_MEMORY_FETCH event triggers (unless it has been silenced). The code fetch request is ignored, and no data is returned.

Frame 0 Read Protect
Setting this bit will protect the region $0000 through $3FFF (Page Frame 0) from read accesses. If this bit is set and a read in this range is attempted, then a KOKINA235_EVENT_PT_MEMORY_READ event triggers (unless it has been silenced). The read request is ignored, and no data is returned.

Frame 0 Write Protect
Setting this bit will protect the region $0000 through $3FFF (Page Frame 0) from write accesses. If this bit is set and a write in this range is attempted, then a KOKINA235_EVENT_PT_MEMORY_WRITE event triggers (unless it has been silenced). The write request is ignored, and no data is written (memory will not be modified).

Frame 0 Fetch Protect
Setting this bit will protect the region $0000 through $3FFF (Page Frame 0) from code fetches. If this bit is set and a code fetch in this range is attempted, then a KOKINA235_EVENT_PT_MEMORY_FETCH event triggers (unless it has been silenced). The code fetch request is ignored, and no data is returned.

Reserved
These bits are reserved for future expansion.

5.2.1.17 KokinCART_A235 AXR[$FC]: Backup RAM Configuration Register (BRCR)

The Backup RAM Configuration Register controls the enabling and mapping of backup RAM pages in Page Frame 2 (memory $8000-$BFFF). This register is accessible via writes to memory address $FFFC.

This register is accessible via writes to memory address $FFFC, but it cannot be read from this address. Reads from memory address $FFFC return SRAM data. Since SRAM mirrors data at $DFFC to $FFFC, a read from $FFFC cannot be guaranteed to be the last value written to the BRCR. An intervening write to $DFFC will corrupt $FFFC so that it no longer represents the data in BRCR.

BRCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Reserved				Enable BRAM	Use BRAM Page 1	Reserved

Table 5.2.1.17.a: Bit Fields of the Backup RAM Configuration Register (BRCR)

Access: READ-ONLY

Bit Fields:
Enable BRAM
Setting this bit will force RAM pages to be mapped into page frame 2 ($8000-$BFFF) rather than ROM pages.

Use BRAM Page 1
If this bit is set, the second BRAM page (page 1) will be mapped into page frame 2. If the bit is clear, the BRAM page 0 will be mapped into page frame 2.

Reserved
These bits are reserved for future expansion.

5.2.1.18 KokinCART_A235 AXR[$FD]: Page Frame 0 Register (PF0R)

The Page Frame 0 Register contains the desired page number to map into page frame 0 (memory $0000-$3FFF). This value may not be the actual page in that frame, however. The actual page number is calculated by taking the PF0R value modulo the total number of installed ROM pages. (See the definition for the Page Count Register .)

This register is accessible via writes to memory address $FFFD, but it cannot be read from this address. Reads from memory address $FFFD return SRAM data. Since SRAM mirrors data at $DFFD to $FFFD, a read from $FFFD cannot be guaranteed to be the last value written to the PF0R. An intervening write to $DFFD will corrupt $FFFD so that it no longer represents the data in PF0R.

PF0R	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Desired Page Number

Table 5.2.1.18.a: Bit Fields of the Page Frame 0 Register (PF0R)

Access: READ-ONLY

Bit Fields:
Desired Page Number
The number of the desired page to be mapped into page frame 0. The actual page number used is this value modulo the ROM page count. For example, if there are 16 ROM pages, but 17 is written to this register, then page number 1 gets mapped into the page frame 0. This ensures that only physically existing pages are mapped into page frame 0, regardless of the value written to this register. This behavior is necessary as a lot of commercial software will set the high bit of the PFR writes. This would lead to a non-existent page being loaded if the range check wasn't performed.

Reserved
These bits are reserved for future expansion.

5.2.1.19 KokinCART_A235 AXR[$FE]: Page Frame 1 Register (PF1R)

The Page Frame 1 Register contains the desired page number to map into page frame 0 (memory $4000-$7FFF). This value may not be the actual page in that frame, however. The actual page number is calculated by taking the PF1R value modulo the total number of installed ROM pages. (See the definition for the Page Count Register .)

This register is accessible via writes to memory address $FFFE, but it cannot be read from this address. Reads from memory address $FFFE return SRAM data. Since SRAM mirrors data at $DFFE to $FFFE, a read from $FFFE cannot be guaranteed to be the last value written to the PF1R. An intervening write to $DFFE will corrupt $FFFE so that it no longer represents the data in PF1R.

PF1R	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Desired Page Number

Table 5.2.1.19.a: Bit Fields of the Page Frame 1 Register (PF1R)

Access: READ-ONLY

Bit Fields:
Desired Page Number
The number of the desired page to be mapped into page frame 1. The actual page number used is this value modulo the ROM page count. For example, if there are 16 ROM pages, but 17 is written to this register, then page number 1 gets mapped into the page frame 1. This ensures that only physically existing pages are mapped into page frame 1, regardless of the value written to this register. This behavior is necessary as a lot of commercial software will set the high bit of the PFR writes. This would lead to a non-existent page being loaded if the range check wasn't performed.

Reserved
These bits are reserved for future expansion.

5.2.1.20 KokinCART_A235 AXR[$FF]: Page Frame 2 Register (PF2R)

The Page Frame 2 Register contains the desired page number to map into page frame 2 (memory $8000-$BFFF) when BRAM isn't being mapped. This value may not be the actual page in that frame, however. The actual page number is calculated by taking the PF2R value modulo the total number of installed ROM pages. (See the definition for the Page Count Register .) The actual page also depends on whether BRAM is enabled. (See the definition for the Backup RAM Configuration Register .)

This register is accessible via writes to memory address $FFFF, but it cannot be read from this address. Reads from memory address $FFFF return SRAM data. Since SRAM mirrors data at $DFFF to $FFFF, a read from $FFFF cannot be guaranteed to be the last value written to the PF2R. An intervening write to $DFFF will corrupt $FFFF so that it no longer represents the data in PF2R.

PF2R	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Desired Page Number

Table 5.2.1.20.a: Bit Fields of the Page Frame 2 Register (PF2R)

Access: READ-ONLY

Bit Fields:
Desired Page Number
The number of the desired page to be mapped into page frame 2. The actual page number used is this value modulo the ROM page count, when BRAM isn't enabled. For example, if there are 16 ROM pages, but 17 is written to this register, then page number 1 gets mapped into the page frame 2. This ensures that only physically existing pages are mapped into page frame 2, regardless of the value written to this register. This behavior is necessary as a lot of commercial software will set the high bit of the PFR writes. This would lead to a non-existent page being loaded if the range check wasn't performed.

Reserved
These bits are reserved for future expansion.

5.2.2 KokinCART_A235 Events

Event Code	Event Mnemonic
$00 - $03	AGAMA Reserved
$04	KOKINA235_EVENT_CP_WRITE_READONLY_AXR
$05	KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT
$06	KOKINA235_EVENT_CP_WRITE_RESERVED_AXR
$07	KOKINA235_EVENT_CP_READ_READONLY_AXR
$08 - $0F	AGAMA Reserved
$10 - $40	Reserved
$41	KOKINA235_EVENT_PT_PAGING_DISABLED
$42 - $47	Reserved
$48	KOKINA235_EVENT_PT_MEMORY_FETCH
$49	KOKINA235_EVENT_PT_MEMORY_WRITE
$4A	KOKINA235_EVENT_PT_MEMORY_READ
$4B - $7F	Reserved
$80	KOKINA235_EVENT_BP_NOBRAMPRESENTACCESS
$81 - $FF	Reserved

Table 5.2.2.a: KokinCART_A235 Events

5.2.2.1 Event[$04] KOKINA235_EVENT_CP_WRITE_READONLY_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$04]	KOKINA235_EVENT_CP_WRITE_READONLY_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0004
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.2.2.2 Event[$05] KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$05]	KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0005
	DEAR:	Index of the destination AXR
	DEDR:	A bit-mask of the affected read-only bits
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.2.2.3 Event[$06] KOKINA235_EVENT_CP_WRITE_RESERVED_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$06]	KOKINA235_EVENT_CP_WRITE_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0006
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.2.2.4 Event[$07] KOKINA235_EVENT_CP_READ_RESERVED_AXR

This event triggers when a read from a reserved AGAMA Extension Register (AXR) is attempted. Since the AXR is reserved noread data is returned. A value of 0 is placed in the DEDR.

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$07]	KOKINA235_EVENT_CP_READ_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0007
	DEAR:	Index of the destination AXR
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.2.2.5 Event[$41] KOKINA235_EVENT_PT_PAGING_DISABLED

The KokinCART_A235 device supports disabling paging in any or all of the page frames via configuration bits in the Page Frame Configuration Register (PFCR). If a write to one of the Page Frame Registers (BRCR, PF0R, PF1R, PF2R) is attempted while the corresponding disable bit is set in the Page Frame Configuration Register (PFCR), then this event will trigger.

This event, along with the Page Frame Configuration Register (PFCR) is intended to allow Monitor Mode code to intercept all paging operations before they take place. For example, the Monitor could intercept the paging operation, replacing the intended page with a different page altogether. The Monitor can also simply log the paging operation (for profiling purposes) and then allow the normal paging operation to complete. The values in the Device Event Address Register (DEAR) and Device Event Data Register (DEDR) contain the page frame register address and desired page number, respectively.

This is a protection event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Attempting to reset the SHUTDOWN flag in the EHFR will trigger a KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a protection event, it can be silenced but it will not be silenced by default. If the user wishes to silence a protection event, the silent flags must be set manually or via Monitor software (the Monitor Mode handling flag must be set in the EHFR for this event in order to enter Monitor Mode). However, the silent flags will be RESET automatically when the current instruction retires. Note that simply silencing a protection event will not allow the desired access to proceed. Silencing just prevents the event from triggering again during the current instruction. To allow the access to proceed, the protection on that type of access must be removed.

Event[$41]	KOKINA235_EVENT_PT_PAGINGDISABLED
Type	PROTECTION
Default Action	SHUTDOWN
Silent Flags	No change, but can be manually SET by user or Monitor Code. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0041
	DEAR:	Address of paging register ($FFFC through $FFFF)
	DEDR:	Desired page number
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.2.2.6 Event[$48] KOKINA235_EVENT_PT_MEMORY_FETCH

Event[$48]	KOKINA235_EVENT_PT_MEMORY_FETCH
Type	PROTECTION
Default Action	SHUTDOWN
Silent Flags	No change, but can be manually SET by user or Monitor Code. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0048
	DEAR:	Address of memory access with code fetch protection enabled.
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.2.2.7 Event[$49] KOKINA235_EVENT_PT_MEMORY_WRITE

Event[$49]	KOKINA235_EVENT_PT_MEMORY_WRITE
Type	PROTECTION
Default Action	SHUTDOWN
Silent Flags	No change, but can be manually SET by user or Monitor Code. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0049
	DEAR:	Address of memory access with write protection enabled.
	DEDR:	Intended write data
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.2.2.8 Event[$4A] KOKINA235_EVENT_PT_MEMORY_READ

This is a protection event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Attempting to reset the SHUTDOWN flag in the EHFR will trigger a KOKINA235_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a protection event, it can be silenced but it will not be silenced by default. If the user wishes to silence a protection event, the silent flags must be set manually or via Monitor software (the Monitor Mode handling flag must be set in the EHFR for this event in order to enter Monitor Mode). However, the silent flags will be RESET automatically when the current instruction retires. Note that simply silencing a protection event will not allow the desired access to proceed. Silencing just prevents the event from triggering again during the current instruction. To allow the access to proceed, the protection on that type of access must be removed.

Event[$4A]	KOKINA235_EVENT_PT_MEMORY_READ
Type	PROTECTION
Default Action	SHUTDOWN
Silent Flags	No change, but can be manually SET by user or Monitor Code. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$004A
	DEAR:	Address of memory access with read protection enabled.
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.2.2.9 Event[$80] KOKINA235_EVENT_BP_NOBRAMPRESENTACCESS

This event triggers when (it's enabled and) a write to the Backup RAM Configuration Register (BRCR) is attempted via memory address $FFFC but no BRAM has been installed in the device (the BRAMPRESENT bit in Device Status Register (DSR) is clear, indicating no BRAM is present).

This event is a breakpoint event, so providing no handling method (or silencing the event) will allow the BRCR access to proceed. However, with no BRAM preset, the write to BRCR has no effect. Page Frame 2 will still contain the ROM page indicated by Page Frame 2 Register (PF2R)

Currently, the MesaDX application always supplies 2 pages of BRAM to the KokinCART_A235 device, so the BRAMPRESENT bit in the Device Status Register (DSR) will always be set, and this event can never trigger.

Event[$80]	KOKINA235_EVENT_PT_NOBRAMPRESENTACCESS
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes
Device Event Register Updates	DECR:	$0080
	DEAR:	$FFFC
	DEDR:	Data intended for BRCR
	DEFR:	Current Event Handling Flags (EHFR) for this event

5.2.3 KokinCART_A235 Power-On Self Test Codes

Message Code	Message Mnemonic	Description
$01	NO_HUB_FOUND	The KokinCART_A235 device requires access to a HUB device for correct operation. During POST the HUB device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$02	ROM_ERROR	The KokinCART_A235 device supports between 1 and 256 16KB pages of ROM data. This POST code will be returned under the following conditions: 1.) No ROM data was provided to the KokinCART_A235 device at power-on. (If no ROM data is required, than the KokinCART_A235 device should not have been installed.) 2.) More than 256 16KB pages of ROM data were provided, or 3.) A non-integral number of 16KB pages of ROM data was provided. This POST code is most likely the result of using the wrong ROM image with the KokinCART_A235 device.
$03	BRAM_ERROR	The KokinCART_A235 device supports between 0 and 2 16KB pages of RAM data. This POST code will be returned under the following conditions: 1.) More than 2 16KB pages of RAM data were provided, or 2.) A non-integral number of 16KB pages of RAM data was provided. This POST code is most likely the result of using the wrong RAM image with the KokinCART_A235 device.
$0F	INTERNAL_ERROR	This POST code will be returned if the KokinCART_A235 is unable to allocate all the memory it needs for correct operation. This code may occur in release versions of MesaDX if system resources are low.

5.3 KokinCART_A0CD: A CodeMasters Compatible Mapper

The KokinCART_A0CD device can be installed as a BROM or EXT0 device. See Chapter 3: AGAMA Devices for more information about specific device types.

5.3.1 KokinCART_A0CD AGAMA Extension Registers

The KokinCART_A0CD AXRs are nearly identical to the KokinCART_A235 AXRs. However, the KokinCART_A0CD device does not support BRAM, so any references to BRAM status or configuration bits should be considered Reserved in the KokinCART_A0CD device AXRs. Also the Backup RAM Configuration Register does not exist in the KokinAOCD device.

This section will be filled out more in the future.

[To Be Completed]

5.3.2 KokinCART_A0CD Events

The KokinCART_A0CD events are nearly identical to the KokinCART_A235 Events. However, the KokinCART_A0CD device does not support BRAM, so any references to events related to BRAM should be ignored.

This section will be filled out more in the future.

[To Be Completed]

5.3.3 KokinCART_A0CD Power-On Self Test Codes

The KokinCART_A0CD events are identical to the KokinCART_A235 Power-On Self Test Codes.

This section will be filled out more in the future.

[To Be Completed]

Chapter 6: Video Display Processor (VDP) Devices

6.1 KokinVDP_A124: A 315-5124 (SMS1 1) Compatible VDP

6.1.1 KokinVDP_A124 AGAMA Extension Registers

AGAMA Extension Register (AXR)	Register Name
AXR[$00]	Device ID Register (DIR)
AXR[$01]	Power-On Configuration Register (POCR)
AXR[$02]	Device Model Register (DMR)
AXR[$03]	Device Version Register (DVR)
AXR[$04]	Device Status Register (DSR)
AXR[$05]	AGAMA Reserved
AXR[$06]	AGAMA Reserved
AXR[$07]	AGAMA Reserved
AXR[$08]	Event Handling Code Register (EHCR)
AXR[$09]	Event Handling Flags Register (EHFR)
AXR[$0A]	Event Monitor Vector Register (EMVR)
AXR[$0B]	AGAMA Reserved
AXR[$0C]	Device Event Code Register (DECR)
AXR[$0D]	Device Event Address Register (DEAR)
AXR[$0E]	Device Event Data Register (DEDR)
AXR[$0F]	Device Event Flags Register (DEFR)
AXR[$10]	Device Event Flags Register (DSUR)
AXR[$11]	VDP ConfigurationRegister (VCR)
AXR[$12]-AXR[$13]	Reserved
AXR[$14]	Command Word Register (CWR)
AXR[$15]	VRAM Address Register (VAR)
AXR[$16]	Data Buffer Register (DBR)
AXR[$17]	VDP Status Register (VSR)
AXR[$18]	Current Scanline Register (CSR)
AXR[$19]	Line Count-down Register (LCR)
AXR[$1A]-AXR[$20]	Reserved
AXR[$21]	Register Write Breakpoint Register (RWBR)
AXR[$22]	CRAM-Low Write Breakpoint Register (CLWBR)
AXR[$23]	CRAM-Low Write Breakpoint Register (CHWBR)
AXR[$24]-AXR[$2F]	Reserved
AXR[$30]	Memory Attribute Address Register (MAAR)
AXR[$31]	Memory Attribute Data Register (MADR)
AXR[$32]-AXR[$FF]	Reserved

Table 6.1.1.a: KokinVDP_A124 AGAMA Extension Registers

6.1.1.1 KokinVDP_A124 AXR[$00]: Device ID Register (DIR)

The Device ID Register contains the 4-bit Device ID for the KokinVDP_A124 device. The Device ID is assigned on Power-On and is used to address the KokinVDP_A124 during certain types of bus transactions, such as AXR reads and writes.

DIR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	AGAMA Reserved				Device ID[3:0]

Table 6.1.1.1.a: Bit Fields of the Device ID Register (DIR)

Access: READ-ONLY

Bit Fields:
Device ID
The 4-bit Device ID for the device.

AGAMA Reserved
These bits are reserved for future expansion.

6.1.1.2 KokinVDP_A124 AXR[$01]: Power-On Configuration Register (POCR)

The Power-On Configuration Register contains the initial configuration settings of the KokinVDP_A124 device. The KokinVDP_A124 device will sample all the configuration settings and save them in the POCR, but not all the settings are used. The bit field descriptions below indicate which Power-On Configuration settings are ignored by the KokinVDP_A124 device.

POCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	POST Code				AGAMA Reserved		Monitor Mode	Suspended
Byte 0	GG Mode	Export Region	50Hz	AGAMA Reserved	SMS1 Bus	Lock Boot Device	Boot Device

Table 6.1.1.2.a: Bit Fields of the Power-On Configuration Register (POCR)

Access: READ-ONLY

Bit Fields:
POST Code
A 4-bit code indicating the result of the Power-On Self Test (POST) for the KokinVDP_A124 device. A zero value indicates that the device passed POST. A non-zero value indicates a failure. A list of the KokinVDP_A124 POST failure codes, along with detailed descriptions for each code, can be found in Appendix B: Power-On Self Test (POST) Code Summary

Monitor Mode
If this bit is set, the KokinVDP_A124 device powered-on in Monitor Mode. Otherwise, the KokinVDP_A124 device powered-on in Compatible Mode. Monitor mode is disabled in the current release of the Kokin Library, so this bit will always be reset (0).

Suspended
If this bit is set, the KokinVDP_A124 device powered-on suspended. If not set, the KokinVDP_A124 device powered-on resumed and immediately began responding to all bus transactions.

GG Mode
The KokinVDP_A124 device ignores this bit since its operation is independent of the SMS or GG operating modes.

Export Region
The KokinVDP_A124 device ignores this bit since its operation is independent of the region setting of the machine.

50Hz
The KokinVDP_A124 uses this bit to render video frames at 50Hz.

SMS1 Bus
The KokinVDP_A124 device ignores this bit.

Lock Boot Device
The KokinVDP_A124 device ignores this bit.

Boot Device
The KokinVDP_A124 device ignores these bits since its operation is independent of the initial boot device.

AGAMA Reserved
These bits are reserved for future expansion.

6.1.1.3 KokinVDP_A124 AXR[$02]: Device Model Register (DMR)

The Device Model Register contains the KokinVDP_A124 device's model number: A124. The 'A' indicates that the KokinVDP_A124 is an AGAMA Device, and the '124' indicates this device has functionality similar to the Sega 315-5124 VDP used in early version of the Sega Master System Model 1.

DMR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Model Number
Byte 0	Model Number

Table 6.1.1.3.a: Bit Fields of the Device Model Register (DMR)

Access: READ-ONLY

Bit Fields:
Model Number
The KokinVDP_A124 device's model number. The current model number for this device is A124.

6.1.1.4 KokinVDP_A124 AXR[$03]: Device Version Register (DVR)

The Device Version Register specifies the implementation version of the KokinVDP_A124 device. Currently, the version number is 00.00 for all devices in the Kokin library.

DVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Major Version
Byte 0	Minor Version

Table 6.1.1.4.a: Bit Fields of the Device Version Register (DVR)

Access: READ-ONLY

Bit Fields:
Major Version
The major version number of the device implementation.

Minor Version:
The minor version number of the device implementation.

6.1.1.5 KokinVDP_A124 AXR[$04]: Device Status Register (DSR)

The Device Status Register contains general information about the KokinVDP_A124 device's current state.

DSR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent Set	Monitor Silent Set	Reserved		Device Enabled	Shutdown	Monitor Mode	Suspended
Byte 0	Reserved

Table 6.1.1.5.a: Bit Fields of the Device Status Register (DSR)

Access: READ-ONLY

Bit Fields:
Compatible Silent Set
A COMPATBILESILENT flag is set in one of the KokinVDP_A124 device's EHFR registers. If this bit is set and the KokinVDP_A124 device is in Compatible Mode when it receives a CLEARSILENTFLAGS message then the COMPATIBLESILENT and MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Monitor Silent Set
A MONITORSILENT flag is set if one of the KokinVDP_A124 device's EHFR registers. If this bit is set and the device is in Monitor Mode when it receives a CLEARSILENTFLAGS message then the MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Device Enabled
The KokinVDP_A124 device is enabled. This bit is always set in this version of the KokinVDP_A124 implementation.

Shutdown
The KokinVDP_A124 device has entered Shutdown. The KokinVDP_A124 device will no longer respond to bus transactions, other than SYSMESSAGE transactions. A Power-On (Hard-Reset) is required to bring the KokinMIOH device and the rest of the system out of shutdown.

Monitor Mode
The KokinVDP_A124 device is operating in Monitor Mode. All Monitor Mode functionality has been disabled in this release of the Kokin library, so this bit will always be reset (0).

Suspended
The KokinVDP_A124 device has suspended. The device will still respond to bus traffic, but will not perform any "active" processing such as refreshing the video display.

Reserved
These bits are reserved for future expansion.

6.1.1.6 KokinVDP_A124 AXR[$08]: Event Handling Code Register (EHCR)

The Event Handling Code Register is used to control the data appearing in the Event Handling Flags Register (EHFR). Together, the EHCR and EHFR control the access to the event flags that indicate how an event should be handled when it occurs. The event flags in the EHFR correspond to the event code in the EHCR. Writing a new event code to the EHCR will update the EHFR with that event's flags which can then be modified via the EHFR. The event codes for the KokinVDP_A124 device can be found in Appendix C: Event Code Summary.

EHCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 6.1.1.6.a: Bit Fields of the Event Handling Code Register (EHCR)

6.1.1.7 KokinVDP_A124 AXR[$09]: Event Handling Flags Register (EHFR)

EHFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 6.1.1.7.a: Bit Fields of the Event Handling Flags Register (EHFR)

Access: READ/WRITE

Bit Fields:
Compatible Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinVDP_A124 device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinVDP_A124 device receives a CLEARSILENTFLAGS message while in Compatible Mode, this bit (along with the Monitor Silent bit) is cleared for all 256 events. If the device is in Monitor Mode, this bit is not affected by a CLEARSILENTFLAGS message.

Monitor Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinVDP_A124 device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinVDP_A124 device receives a CLEARSILENTFLAGS message while in Monitor Mode, this bit is cleared for all 256 events.

Shutdown
Setting this bit indicates that the system should enter Shutdown mode when the event triggers. This flag is only examined if no other event handling flag is set (such as Monitor Mode or Suspend described below). Shutdown mode is used when an error or event occurs and no error recovery is possible. For example, if the KokinVDP_A124 device encounters an unknown opcode the system may enter shutdown if no other event handling is specified. For Events and Event Handling for more information about shutdown and the different types of device events.

Monitor Mode
Setting this bit indicates that the system should enter Monitor Mode when the event triggers. This bit is read-only for all devices in this version of the Kokin Library.

Suspend
Setting this bit indicates that the system should suspend execution when the event triggers.

AGAMA Reserved
These bits are reserved for future expansion.

6.1.1.8 KokinVDP_A124 AXR[$0A]: Event Monitor Vector Register (EMVR)

The Event Monitor Vector Register (EMVR) contains the address of the KokinVDP_A124 device's Monitor Mode handler. When a device event triggers and the Monitor Mode event flag is set, the device will request that the system enter Monitor Mode and program flow will jump to the address specified in this register. Monitor mode is not available in the current release of the Kokin Library, so this register is not used, but it can be written to.

EMVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Monitor Vector Address[15:8]
Byte 0	Monitor Vector Address[7:0]

Table 6.1.1.8.a: Bit Fields of the Event Monitor Vector Register (EMVR)

Access: READ/WRITE

Bit Fields:
Monitor Vector Address
The address of the KokinVDP_A124 device's Monitor Mode handler.

6.1.1.9 KokinVDP_A124 AXR[$0C]: Device Event Code Register (DECR)

DECR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 6.1.1.9.a: Bit Fields of the Device Event Code Register (DECR)

Access: READ-ONLY

Bit Fields:
Event Code
The 8-bit event code for the last triggered event.

AGAMA Reserved
These bits are reserved for future expansion.

6.1.1.10 KokinVDP_A124 AXR[$0D]: Device Event Address Register (DEAR)

DEAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Address[15:8]
Byte 0	Event-specific Address[7:0]

Table 6.1.1.10.a: Bit Fields of the Device Event Address Register (DEAR)

6.1.1.11 KokinVDP_A124 AXR[$0E]: Device Event Data Register (DEDR)

DEDR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Data[15:8]
Byte 0	Event-specific Data[7:0]

Table 6.1.1.11.a: Bit Fields of the Device Event Data Register (DEDR)

6.1.1.12 KokinVDP_A124 AXR[$0F]: Device Event Flags Register (DEFR)

DEFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 6.1.1.12.a: Bit Fields of the Device Event Flags Register (DEFR)

Access: READ-ONLY

Bit Fields:
Compatible Silent
The Compatible Silent flag is set for the triggered event. The next time this event occurs while the KokinVDP_A124 device is in Compatible Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Silent
The Monitor Silent flag is set for the triggered event. The next time this event occurs while the KokinVDP_A124 device is in Monitor Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Shutdown
The Shutdown flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Shutdown mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Mode
The Monitor Mode flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Monitor Mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Suspend
The Suspend flag is set for the triggered event, indicating that one possible mechanism for handling the event was to suspend execution. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

AGAMA Reserved
These bits are reserved for future expansion.

6.1.1.13 KokinVDP_A124 AXR[$10]: Device State Update Register (DSUR)

This register is not implemented in this version of KokinVDP_A124.

6.1.1.14 KokinVDP_A124 AXR[$11]: VDP Configuration Register (VCR)

This register is used to set various configuration options for the VDP. These options don't exist in the real SM3A VDP; they are provided by the KokinVDP_A124 device for convenience and may be useful during software development or for debug.

VCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Use High CRAM for Tile View	Reserved		Enable Sprite Limit	Reserved	Render Sprites	Render Patterns	Render Backdrop

Table 6.1.1.14.a: Bit Fields of the VDP Configuration Register (VCR)

Access: READ/WRITE

Bit Fields:
Use High CRAM
for Tile View
The KokinVDP_A124 displays information on two virtual screens. The primary screen contains the standard video output. The secondary screen is used for displaying other graphical information such as the pattern table or palette. When in Mode4, the secondary screen displays the pattern table and palette. If this bit is set (while in Mode4) the tiles will be displayed on the secondary screen using the colors in High CRAM. If this bit is reset the tiles will be displayed using the colors in Low CRAM. While in mode 'Graphics2', if this bit is set the pattern table is shown in the secondary screen. If this bit is cleared while in 'Graphics2', then the sprites are shown near the top of the screen and palette is shown near the bottom. The function of this bit while in 'Graphics2' may change in future versions of this device.

Enable Sprite Limit
When this bit is SET the sprite line limit restriction is enforced (8 sprites in Mode4, 4 sprites in Graphics2). If the bit is RESET, there is no line sprite limit, and all of the available sprites may be displayed on a line. This bit is SET at power-on, and it is recommended to leave it SET when doing software development to see how the sprites will appear on a real SM3A system.

Render Sprites
When this bit is SET, sprites will be displayed on the primary VDP screen. RESETing this bit will prevent sprites from being displayed; RESETing this bit may be useful for debugging background display issues without having to adjust the sprite table. This bit is SET at power-on.

Render Patterns
When this bit is SET, the background tiles will be displayed on the primary VDP screen. RESETing this bit will prevent the background from being shown. RESETing this bit may be useful for debugging sprite issues without the visual "noise" of the background tiles. This bit is SET at power-on.

Render Backdrop
When this bit is SET, the backdrop (overscan) area is rendered on the left and right edges of the primary VDP screen. Rendering the backdrop may prove useful to developers who wish to see how the chosen backdrop color appears in the context of the normal video display. RESETing this bit will prevent the backdrop from being shown. This bit is SET at power-on.

Reserved
These bits are reserved for future expansion.

6.1.1.15 KokinVDP_A124 AXR[$14]: Command Word Register (CWR)

This register contains the last command word written to the VDP. Updates to this register are accomplished in two steps of one byte each. The first byte is stored in the least-significant byte of the CWR. The second byte completes the command and is stored in the most-significant byte of the CWR. The 'Command Sync' flag in the VDP Status Register (VSR) indicates the phase of the command word write operation. If the 'Command Sync' flag is set, then only the first byte of the command has been written and another write is expected to complete the command.

CWR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Command		VRAM Address [13:8]
Byte 0	VRAM Address [7:0]

Table 6.1.1.15.a: Bit Fields of the Command Word Register (CWR)

Access: READ-ONLY

Bit Fields:
Command
The last command issued to the VDP. This description will be expanded on in the future. For now, please see the Bibliography for a list of references on the SMS1 VDP and the different commands it supports.

VRAM Address
The VRAM address specified for the last command. This description will be expanded on in the future. For now, please see the Bibliography for a list of references on the SMS1 VDP and the different commands it supports.

6.1.1.16 KokinVDP_A124 AXR[$15]: VRAM Address Register (VAR)

This register contains the VRAM address that will be used during the next data access. For VRAM reads, this is the address that will be used to refill the Data Buffer Register (DBR). For writes, it is the VRAM address that will be written to. This address will auto-increment after a data access, so it does not always equal to the VRAM address specified in the Command Word Register (CWR).

VAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved		VRAM Address [13:8]
Byte 0	VRAM Address [7:0]

Table 6.1.1.16.a: Bit Fields of the VRAM Address Register (VAR)

Access: READ-ONLY

Bit Fields:
VRAM Address
The VRAM address to be used during the next VRAM data access. This description will be expanded on in the future. For now, please see the Bibliography for a list of references on the SMS1 VDP its operation.

Reserved
These bits are reserved for future expansion.

6.1.1.17 KokinVDP_A124 AXR[$16]: Data Buffer Register (DBR)

This register contains the data byte that will be returned during the next data read. It is the data from the VRAM address previous to the address specified in VRAM Address Register (VAR).

DBR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Data

Table 6.1.1.17.a: Bit Fields of the VRAM Address Register (VAR)

Access: READ-ONLY

Bit Fields:
Data
VRAM data from the previous VRAM address

Reserved
These bits are reserved for future expansion.

6.1.1.18 KokinVDP_A124 AXR[$17]: VDP Status Register (VSR)

This register contains architectural VDP status bits (in contrast to the Device Status Register (DSR) which contains AGAMA device status) along with the 'Command Sync' bit which is used to help implement the command-word functionality of the VDP. The low-order byte is software accessible via an I/O port. These status bits are defined in the 315-5124 (SMS1) VDP. The status bits in the high byte are only accessible via an AXR access (in Monitor Mode or by the External Debugger (EXTD) device).

VSR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Command Sync	Reserved
Byte 0	V-Sync	Sprite Overflow	Sprite Collision	Reserved

Table 6.1.1.18.a: Bit Fields of the VDP Status Register (VSR)

Access: READ-ONLY

Bit Fields:
Command Sync
When set, only one byte of the command word has been received. (See the Command Word Register (CWR) section for more information on the VDP Command Word.) When this bit is cleared it indicates that a complete command word has been recieved.

V-Sync
When set this bit indicates the VDP has reached the vertical blank section of the frame. If the V-Sync interrupts are enabled (via bit 5 in VDP Register 1) then the VDP interrupt line will be asserted while this bit is set. This is a sticky big and will remain set until the VDP Status Register (VSR) is read via an I/O port. (It will not be cleared by an AXR read of this register.)

Sprite Overflow
This bit is set if too may sprites appear on a scan line. In Mode 4 the sprite limit is 8. In Graphics2 the sprite limit is 4.

Sprite Collision
This bit is set if two (or more) sprite pixels appear on top of one another.

Reserved
These bits are reserved for future expansion.

6.1.1.19 KokinVDP_A124 AXR[$18]: Current Scanline Register (CSR)

This register is the number of the scanline currently being render.

CSR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Current Scanline [15:8]
Byte 0	Current Scanline [7:0]

Table 6.1.1.19.a: Bit Fields of the Current Scanline Register (CSR)

Access: READ-ONLY

Bit Fields:
Current Scanline
The current scanline being rendered. This includes scanlines in the vertical blanking area.

6.1.1.20 KokinVDP_A124 AXR[$19]: Line Count-Down Register (LCR)

This register contains the number of scanlines that will be rendered before the next line interrupt is generated.

LCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Count [15:8]
Byte 0	Count [7:0]

Table 6.1.1.20.a: Bit Fields of the Line Count-Down Register (LCR)

Access: READ-ONLY

Bit Fields:
Count
The number of scanlines remaining until the next line count interrupt is generated (when line interrupts are enabled via bit 4 on VDP register 0).

6.1.1.21 KokinVDP_A124 AXR[$21]: Register Write Breakpoint Register (RWBR)

This register is used to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE event when the VDP's registers are written.

RWBR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved					VReg $0A	VReg $09	VReg $08
Byte 0	VReg $07	VReg $06	VReg $05	VReg $04	VReg $03	VReg $02	VReg $01	VReg $00

Table 6.1.1.21.a: Bit Fields of the Register Write Breakpoint Register (RWBR)

Access: READ/WRITE

Bit Fields:
VReg $0A
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE when VReg $0A is written.

VReg $09
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE when VReg $09 is written.

VReg $08
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE when VReg $08 is written.

VReg $07
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE when VReg $07 is written.

VReg $06
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE when VReg $06 is written.

VReg $05
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE when VReg $05 is written.

VReg $04
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE when VReg $04 is written.

VReg $03
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE when VReg $03 is written.

VReg $02
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE when VReg $02 is written.

VReg $01
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE when VReg $01 is written.

VReg $00
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VREG_WRITE when VReg $00 is written.

Reserved
These bits are reserved for future expansion.

6.1.1.22 KokinVDP_A124 AXR[$22]: CRAM-Low Write Breakpoint Register (CLWBR)

This register is used to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE event when the VDP's low ($00 through $0F) palette entries in Color RAM (CRAM) are written.

CLWBR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Entry $0F	Entry $0E	Entry $0D	Entry $0C	Entry $0B	Entry $0A	Entry $09	Entry $08
Byte 0	Entry $07	Entry $06	Entry $05	Entry $04	Entry $03	Entry $02	Entry $01	Entry $00

Table 6.1.1.22.a: Bit Fields of the CRAM-Low Write Breakpoint Register (CLWBR)

Access: READ/WRITE

Bit Fields:
Palette $0F
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $0F.

VReg $0E
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $0E is written.

VReg $0D
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $0D is written.

VReg $0C
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $0C is written.

VReg $0B
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $0B is written.

VReg $0A
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $0A is written.

VReg $09
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $09 is written.

VReg $08
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $08 is written.

VReg $07
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $07 is written.

VReg $06
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $06 is written.

VReg $05
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $05 is written.

VReg $04
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $04 is written.

VReg $03
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $03 is written.

VReg $02
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $02 is written.

VReg $01
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $01 is written.

VReg $00
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $00 is written.

6.1.1.23 KokinVDP_A124 AXR[$23]: CRAM-High Write Breakpoint Register (CHWBR)

This register is used to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE event when the VDP's high palette entries ($10 through $1F) in Color RAM (CRAM) are written.

CHWBR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Entry $1F	Entry $1E	Entry $1D	Entry $1C	Entry $1B	Entry $1A	Entry $19	Entry $18
Byte 0	Entry $17	Entry $16	Entry $15	Entry $14	Entry $13	Entry $12	Entry $11	Entry $10

Table 6.1.1.23.a: Bit Fields of the CRAM-High Write Breakpoint Register (CHWBR)

Access: READ/WRITE

Bit Fields:
VReg $1F
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $1F.

VReg $1E
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $1E is written.

VReg $1D
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $1D is written.

VReg $1C
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $1C is written.

VReg $1B
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $1B is written.

VReg $1A
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $1A is written.

VReg $19
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $19 is written.

VReg $18
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $18 is written.

VReg $17
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $17 is written.

VReg $16
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $16 is written.

VReg $15
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $15 is written.

VReg $14
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $14 is written.

VReg $13
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $13 is written.

VReg $12
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $12 is written.

VReg $11
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $11 is written.

VReg $10
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_CRAM_WRITE when Palette entry $10 is written.

6.1.1.24 KokinVDP_A124 AXR[$30]: Memory Attribute Address Register(MAAR)

The MAAR is used to index the memory attribute data (available in the Memory Attribute Data Register (MADR). Memory attribute data is stored for every VRAM address. The address in the MAAR indicates the address whose attribute data is displayed in the MADR.

MAAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved		VRAM Address [13:8]
Byte 0	VRAM Address [7:0]

Table 6.1.1.24.a: Bit Fields of the Memory Attribute Address Register (MAAR)

Access: READ/WRITE

Bit Fields:
VRAM Address
Memory address whose attributes should be displayed in the MADR.

Reserved
These bits are reserved for future expansion.

6.1.1.25 KokinVDP_A124 AXR[$31]: Memory Attribute Data Register (MADR)

The attributes for the memory byte indicated in the Memory Attribute Address Register (MAAR). To set an event to trigger for a specific address access, first place the desired memory address in the MAAR. Next, set the bits representing the type of event you want based on the bit positions in the table below.

MADR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Reserved					Read Event	Write Event	Reserved

Table 6.1.1.25.a: Bit Fields of the Memory Attribute Data Register (MADR)

Access: READ/WRITE

Bit Fields:
Read Event
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VRAM_READ event when the specified address read from.

Write Event
Set this bit to trigger a KOKINVDP_A124_EVENT_BP_VRAM_WRITE event when the specified address written to.

Reserved
These bits are reserved for future expansion.

6.1.2 KokinVDP_A124 Events

Event Code	Event Mnemonic
$00 - $03	AGAMA Reserved
$04	KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR
$05	KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT
$06	KOKINVDP_A124_EVENT_CP_WRITE_RESERVED_AXR
$07	KOKINVDP_A124_EVENT_CP_READ_READONLY_AXR
$08 - $0F	AGAMA Reserved
$10	KOKINVDP_A124_EVENT_CP_VREG_UNSUPPORTEDMODE
$11 - $7F	Reserved
$80	KOKINVDP_A124_EVENT_BP_VREG_INVALIDVREG
$81	KOKINVDP_A124_EVENT_BP_VREG_UNSUPPORTEDVREGBIT
$82	KOKINVDP_A124_EVENT_BP_VREG_COMPATIBILITYWARNING
$83 - $B0	Reserved
$B1	KOKINVDP_A124_EVENT_BP_VREG_WRITE
$B2 - $B4	Reserved
$B5	KOKINVDP_A124_EVENT_BP_CRAM_WRITE
$B6 - $B8	Reserved
$B9	KOKINVDP_A124_EVENT_BP_VRAM_WRITE
$BA	KOKINVDP_A124_EVENT_BP_VRAM_READ
$BB - $FF	Reserved

Table 6.1.2.a: KokinVDP_A124 Events

6.1.2.1 Event[$04] KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$04]	KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0004
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.2.2 Event[$05] KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$05]	KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0005
	DEAR:	Index of the destination AXR
	DEDR:	A bit-mask of the affected read-only bits
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.2.3 Event[$06] KOKINVDP_A124_EVENT_CP_WRITE_RESERVED_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$06]	KOKINVDP_A124_EVENT_CP_WRITE_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0006
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.2.4 Event[$07] KOKINVDP_A124_EVENT_CP_READ_RESERVED_AXR

This event triggers when a read from a reserved AGAMA Extension Register (AXR) is attempted. Since the AXR is reserved noread data is returned. A value of 0 is placed in the DEDR.

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$07]	KOKINVDP_A124_EVENT_CP_READ_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0007
	DEAR:	Index of the destination AXR
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.2.5 Event[$10] KOKINVDP_A124_EVENT_CP_UNSUPPORTEDMODE

This event triggers when the VDP is directed to transition into an unsupported video mode. Currently, the KokinVDP_A124 device only supports two modes: Graphics2 and Mode4.

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINVDP_A124_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$07]	KOKINVDP_A124_EVENT_CP_UNSUPPORTEDMODE
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	Yes.
Device Event Register Updates	DECR:	$0010
	DEAR:	Index of the VReg written that changed the display mode (0 or 1)
	DEDR:	High byte: Desired (new) mode, Low byte: Current mode
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.2.6 Event[$80] KOKINVDP_A124_EVENT_BP_INVALIDVREG

This event triggers when a Mode4 VDP register is written while not in Mode 4. The Mode4 registers are VRegs $08, $09 and $0A. These registers should only be accessed while in Mode4 otherwise this event will trigger.

Event[$80]	KOKINVDP_A124_EVENT_BP_INVALIDVREG
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes.
Device Event Register Updates	DECR:	$0080
	DEAR:	Index of the VReg accessed
	DEDR:	The write data intended for the VReg
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.2.7 Event[$81] KOKINVDP_A124_EVENT_BP_UNSUPPORTEDVREGBIT

This event triggers when a VDP register bit is written that specifies a behavior or functionality that is currently unsupported. For example, the KokinVDP_A124 does not support sprite magnification, so if the sprite magnification bit is set in VReg $01 and this event is enabled, then it will trigger.

Event[$81]	KOKINVDP_A124_EVENT_BP_UNSUPPORTEDVREGBIT
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes.
Device Event Register Updates	DECR:	$0081
	DEAR:	Index of the VReg accessed
	DEDR:	High byte: write data, Low byte: bitmask indicating the unsupported bits in the write data
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.2.8 Event[$82] KOKINVDP_A124_EVENT_BP_COMPATIBILITYWARNING

This event triggers when a VDP register bit is written that specifies a behavior or functionality that may result behavior that is not consistent with actual 315-5124 (SMS1) VDP behavior. For the SMS1 VDP there are may VReg bits that must be set a certain way to guarantee correct operation. At this time, it is unknown how the real VDP will behave if these bit settings are incorrect. As a result, it is impossible to model this behavior in the KokinVDP_A124 device emulator. This event is intended to provide the developer with a means of discovering when certain VReg bits are set with values that result in behavior that cannot be emulated. It is recommended that the user always specify SUSPEND handling with this event.

Event[$82]	KOKINVDP_A124_EVENT_BP_COMPATIBILITYWARNING
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes.
Device Event Register Updates	DECR:	$0082
	DEAR:	Index of the VReg accessed
	DEDR:	High byte: write data, Low byte: bitmask of the bits that must be set a particular way to maintain compatibility
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.2.9 Event[$B1] KOKINVDP_A124_EVENT_BP_VREG_WRITE

This event triggers when write to a VDP register is attempted and that register's breakpoint bit in the Register Write Breakpoint Register (RWBR) has been set. This event is used to implement regsiter write breakpoints by setting the SUSPEND bit in this event's Event Handling Flags Register (EHFR) and when used in conjunction with the RWBR.

Event[$B1]	KOKINVDP_A124_EVENT_BP_VREG_WRITE
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes.
Device Event Register Updates	DECR:	$00B1
	DEAR:	Bit-mask of affected registers (as defined by RWBR)
	DEDR:	Write data
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.2.10 Event[$B5] KOKINVDP_A124_EVENT_BP_CRAM_WRITE

This event triggers when write to a VDP palette entry in CRAM is attempted and that register's breakpoint bit in the CRAM-Low Write Breakpoint Register (CLWBR) or CRAM-High Write Breakpoint Register (CHWBR) has been set. This event is used to implement regsiter write breakpoints by setting the SUSPEND bit in this event's Event Handling Flags Register (EHFR) and when used in conjunction with the CLWBR or CHWBR.

Event[$B5]	KOKINVDP_A124_EVENT_BP_CRAM_WRITE
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes.
Device Event Register Updates	DECR:	$00B5
	DEAR:	Index of the palette entry accessed
	DEDR:	Write data
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.2.11 Event[$B9] KOKINVDP_A124_EVENT_BP_VRAM_WRITE

This event triggers when a write to VRAM is attempted and the 'Write Event' bit is set in the Memory Attribute Data Register (MADR) for any of the accessed VRAM addresses.

Event[$B9]	KOKINVDP_A124_EVENT_BP_VRAM_WRITE
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes.
Device Event Register Updates	DECR:	$00B9
	DEAR:	VRAM memory address
	DEDR:	Write data
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.2.12 Event[$BA] KOKINVDP_A124_EVENT_BP_VRAM_READ

This event triggers when a VRAM read is attempted and the 'Read Event' bit is set in the Memory Attribute Data Register (MADR) for any of the accessed VRAM addresses.

Event[$BA]	KOKINVDP_A124_EVENT_BP_VRAM_READ
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes.
Device Event Register Updates	DECR:	$00BA
	DEAR:	VRAM memory address
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

6.1.3 KokinVDP_A124 Power-On Self Test Codes

Message Code	Message Mnemonic	Description
$01	NO_HUB_FOUND	The KokinVDP_A124 device requires access to a HUB device for correct operation. During POST the HUB device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.
$02	UNSUPPORTED_MODE	This POST code will be returned if the VDP is directed to power-on in an unsupported video mode. Currently, this only happens if the GG_MODE power-on configuration bit is set. The KokinVDP_A124 does not support the Sega Game Gear video mode.

Chapter 7: Programmable Sound Generator (PSG) Devices

7.1 KokinPSG Overview

7.2 KokinPSG AGAMA Extension Registers

AGAMA Extension Register (AXR)	Register Name
AXR[$00]	Device ID Register (DIR)
AXR[$01]	Power-On Configuration Register (POCR)
AXR[$02]	Device Model Register (DMR)
AXR[$03]	Device Version Register (DVR)
AXR[$04]	Device Status Register (DSR)
AXR[$05]	AGAMA Reserved
AXR[$06]	AGAMA Reserved
AXR[$07]	AGAMA Reserved
AXR[$08]	Event Handling Code Register (EHCR)
AXR[$09]	Event Handling Flags Register (EHFR)
AXR[$0A]	Event Monitor Vector Register (EMVR)
AXR[$0B]	AGAMA Reserved
AXR[$0C]	Device Event Code Register (DECR)
AXR[$0D]	Device Event Address Register (DEAR)
AXR[$0E]	Device Event Data Register (DEDR)
AXR[$0F]	Device Event Flags Register (DEFR)
AXR[$10]	Device Status Update Register (DSUR)
AXR[$11]	PSG Configuration Register (PCR)
AXR[$12]-AXR[$13]	Reserved
AXR[$14]	Command Buffer Register (CBR)
AXR[$15]-AXR[$20]	Reserved
AXR[$21]	Register Write Breakpoint Register (RWBR)
AXR[$22]-AXR[$EF]	Reserved
AXR[$F0]	Channel 0 Frequency Register (C0FR)
AXR[$F1]	Channel 0 Attenuation Register (C0AR)
AXR[$F2]	Channel 1 Frequency Register (C1FR)
AXR[$F3]	Channel 1 Attenuation Register (C1AR)
AXR[$F4]	Channel 2 Frequency Register (C2FR)
AXR[$F5]	Channel 2 Attenuation Register (C2AR)
AXR[$F6]	Noise Channel Control Register (NCCR)
AXR[$F7]	Noise Channel Attenuation Register (NCAR)
AXR[$F8]-AXR[$FF]	Reserved

Table 7.2.a: KokinPSG AGAMA Extension Registers

7.2.1 KokinPSG AXR[$00]: Device ID Register (DIR)

The Device ID Register contains the 4-bit Device ID for the KokinPSG device. The Device ID is assigned on Power-On and is used to address the KokinPSG during certain types of bus transactions, such as AXR reads and writes.

DIR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	AGAMA Reserved				Device ID[3:0]

Table 7.2.1.a: Bit Fields of the Device ID Register (DIR)

Access: READ-ONLY

Bit Fields:
Device ID
The 4-bit Device ID for the device.

AGAMA Reserved
These bits are reserved for future expansion.

7.2.2 KokinPSG AXR[$01]: Power-On Configuration Register (POCR)

The Power-On Configuration Register contains the initial configuration settings of the KokinPSG device. The KokinPSG device will sample all the configuration settings and save them in the POCR, but not all the settings are used. The bit field descriptions below indicate which Power-On Configuration settings are ignored by the KokinPSG device.

POCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	POST Code				AGAMA Reserved		Monitor Mode	Suspended
Byte 0	GG Mode	Export Region	50Hz	AGAMA Reserved	SMS1 Bus	Lock Boot Device	Boot Device

Table 7.2.2.a: Bit Fields of the Power-On Configuration Register (POCR)

Access: READ-ONLY

Bit Fields:
POST Code
A 4-bit code indicating the result of the Power-On Self Test (POST) for the KokinPSG device. A zero value indicates that the device passed POST. A non-zero value indicates a failure. A list of the KokinPSG POST failure codes, along with detailed descriptions for each code, can be found in Appendix B: Power-On Self Test (POST) Code Summary

Monitor Mode
If this bit is set, the KokinPSG device powered-on in Monitor Mode. Otherwise, the KokinPSG device powered-on in Compatible Mode. Monitor mode is disabled in the current release of the Kokin Library, so this bit will always be reset (0).

Suspended
If this bit is set, the KokinPSG device powered-on suspended. If not set, the KokinPSG device powered-on resumed and immediately began responding to all bus transactions.

GG Mode
The KokinPSG device ignores this bit since its operation is independent of the SMS or GG operating modes.

Export Region
The KokinPSG device ignores this bit since its operation is independent of the region setting of the machine.

50Hz
The KokinPSG ignores this bit.

SMS1 Bus
The KokinPSG device ignores this bit.

Lock Boot Device
The KokinPSG device ignores this bit.

Boot Device
The KokinPSG device ignores these bits since its operation is independent of the initial boot device.

AGAMA Reserved
These bits are reserved for future expansion.

7.2.3 KokinPSG AXR[$02]: Device Model Register (DMR)

The Device Model Register contains the KokinPSG device's model number: A489. The 'A' indicates that the KokinPSG is an AGAMA Device, and the '489' indicates the device is compatible with the TI SN76489 sound generator.

DMR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Model Number
Byte 0	Model Number

Table 7.2.3.a: Bit Fields of the Device Model Register (DMR)

Access: READ-ONLY

Bit Fields:
Model Number
The KokinPSG device's model number. The current model number for this device is A489.

7.2.4 KokinPSG AXR[$03]: Device Version Register (DVR)

The Device Version Register specifies the implementation version of the KokinPSG device. Currently, the version number is 00.00 for all devices in the Kokin library.

DVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Major Version
Byte 0	Minor Version

Table 7.2.4.a: Bit Fields of the Device Version Register (DVR)

Access: READ-ONLY

Bit Fields:
Major Version
The major version number of the device implementation.

Minor Version:
The minor version number of the device implementation.

7.2.5 KokinPSG AXR[$04]: Device Status Register (DSR)

The Device Status Register contains general information about the KokinPSG device's current state.

DSR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent Set	Monitor Silent Set	Reserved		Device Enabled	Shutdown	Monitor Mode	Suspended
Byte 0	Reserved

Table 7.2.5.a: Bit Fields of the Device Status Register (DSR)

Access: READ-ONLY

Bit Fields:
Compatible Silent Set
A COMPATBILESILENT flag is set in one of the KokinPSG device's EHFR registers. If this bit is set and the KokinPSG device is in Compatible Mode when it receives a CLEARSILENTFLAGS message then the COMPATIBLESILENT and MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Monitor Silent Set
A MONITORSILENT flag is set if one of the KokinPSG device's EHFR registers. If this bit is set and the device is in Monitor Mode when it receives a CLEARSILENTFLAGS message then the MONITORSILENT flags in all of the EHFR registers are reset. See the Event Handling Flags Register (EHFR) section for more information about the SILENT flags.

Device Enabled
The KokinPSG device is enabled. This bit is always set in this version of the KokinPSG implementation.

Shutdown
The KokinPSG device has entered Shutdown. The KokinPSG device will no longer respond to bus transactions, other than SYSMESSAGE transactions. A Power-On (Hard-Reset) is required to bring the KokinMIOH device and the rest of the system out of shutdown.

Monitor Mode
The KokinPSG device is operating in Monitor Mode. All Monitor Mode functionality has been disabled in this release of the Kokin library, so this bit will always be reset (0).

Suspended
The KokinPSG device has suspended. The device will still respond to bus traffic, but will not perform any "active" processing such as generating sound output.

Reserved
These bits are reserved for future expansion.

7.2.6 KokinPSG AXR[$08]: Event Handling Code Register (EHCR)

The Event Handling Code Register is used to control the data appearing in the Event Handling Flags Register (EHFR). Together, the EHCR and EHFR control the access to the event flags that indicate how an event should be handled when it occurs. The event flags in the EHFR correspond to the event code in the EHCR. Writing a new event code to the EHCR will update the EHFR with that event's flags which can then be modified via the EHFR. The event codes for the KokinPSG device can be found in Appendix C: Event Code Summary.

EHCR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 7.2.6.a: Bit Fields of the Event Handling Code Register (EHCR)

7.2.7 KokinPSG AXR[$09]: Event Handling Flags Register (EHFR)

EHFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 7.2.7.a: Bit Fields of the Event Handling Flags Register (EHFR)

Access: READ/WRITE

Bit Fields:
Compatible Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinPSG device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinPSG device receives a CLEARSILENTFLAGS message while in Compatible Mode, this bit (along with the Monitor Silent bit) is cleared for all 256 events. If the device is in Monitor Mode, this bit is not affected by a CLEARSILENTFLAGS message.

Monitor Silent
If this bit is set, then the event (whose code is specified in the EHCR) will be silenced (and will not trigger) the next time it occurs while the KokinPSG device is in Compatible Mode. (Note: Compulsory Events, cannot be silenced. Please see the section on Events and Event Handling in the AGAMA Specification for more information about the different types of device events.) This bit is used as a flag for events so that they only trigger once during the execution of an instruction. When the KokinPSG device receives a CLEARSILENTFLAGS message while in Monitor Mode, this bit is cleared for all 256 events.

Shutdown
Setting this bit indicates that the system should enter Shutdown mode when the event triggers. This flag is only examined if no other event handling flag is set (such as Monitor Mode or Suspend described below). Shutdown mode is used when an error or event occurs and no error recovery is possible. For example, if the KokinPSG device encounters an unknown opcode the system may enter shutdown if no other event handling is specified. For Events and Event Handling for more information about shutdown and the different types of device events.

Monitor Mode
Setting this bit indicates that the system should enter Monitor Mode when the event triggers. This bit is read-only for all devices in this version of the Kokin Library.

Suspend
Setting this bit indicates that the system should suspend execution when the event triggers.

AGAMA Reserved
These bits are reserved for future expansion.

7.2.8 KokinPSG AXR[$0A]: Event Monitor Vector Register (EMVR)

The Event Monitor Vector Register (EMVR) contains the address of the KokinPSG device's Monitor Mode handler. When a device event triggers and the Monitor Mode event flag is set, the device will request that the system enter Monitor Mode and program flow will jump to the address specified in this register. Monitor mode is not available in the current release of the Kokin Library, so this register is not used, but it can be written to.

EMVR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Monitor Vector Address[15:8]
Byte 0	Monitor Vector Address[7:0]

Table 7.2.8.a: Bit Fields of the Event Monitor Vector Register (EMVR)

Access: READ/WRITE

Bit Fields:
Monitor Vector Address
The address of the KokinPSG device's Monitor Mode handler.

7.2.9 KokinPSG AXR[$0C]: Device Event Code Register (DECR)

DECR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	AGAMA Reserved
Byte 0	Event Code

Table 7.2.9.a: Bit Fields of the Device Event Code Register (DECR)

Access: READ-ONLY

Bit Fields:
Event Code
The 8-bit event code for the last triggered event.

AGAMA Reserved
These bits are reserved for future expansion.

7.2.10 KokinPSG AXR[$0D]: Device Event Address Register (DEAR)

DEAR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Address[15:8]
Byte 0	Event-specific Address[7:0]

Table 7.2.10.a: Bit Fields of the Device Event Address Register (DEAR)

7.2.11 KokinPSG AXR[$0E]: Device Event Data Register (DEDR)

DEDR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Event-specific Data[15:8]
Byte 0	Event-specific Data[7:0]

Table 7.2.11.a: Bit Fields of the Device Event Data Register (DEDR)

7.2.12 KokinPSG AXR[$0F]: Device Event Flags Register (DEFR)

DEFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Compatible Silent	Monitor Silent	AGAMA Reserved			Shutdown	Monitor Mode	Suspend
Byte 0	AGAMA Reserved

Table 7.2.12.a: Bit Fields of the Device Event Flags Register (DEFR)

Access: READ-ONLY

Bit Fields:
Compatible Silent
The Compatible Silent flag is set for the triggered event. The next time this event occurs while the KokinPSG device is in Compatible Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Silent
The Monitor Silent flag is set for the triggered event. The next time this event occurs while the KokinPSG device is in Monitor Mode the event will be silenced and will not trigger. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Shutdown
The Shutdown flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Shutdown mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Monitor Mode
The Monitor Mode flag is set for the triggered event, indicating that one possible mechanism for handling the event was to enter Monitor Mode. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

Suspend
The Suspend flag is set for the triggered event, indicating that one possible mechanism for handling the event was to suspend execution. See the section on the Event Handling Flag Register (EHFR) for more information about this bit.

AGAMA Reserved
These bits are reserved for future expansion.

7.2.13 KokinPSG AXR[$10]: Device Status Update Register (DSUR)

This register is not implemented in this version of KokinPSG.

7.2.14 KokinPSG AXR[$11]: PSG Configuration Register (PCR)

The PSG Configuration Register (PCR) is used to set various configuration options for the PSG. These options don't exist in the real SM3A PSG; they are provided by the KokinPSG device for convenience and may be useful during software development or for debug.

DEFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Reserved				Enable Channel 3	Enable Channel 2	Enable Channel 1	Enable Channel 0

Table 7.2.14.a: Bit Fields of the PSG Configuration Register (PCR)

Access: READ/WRTIE

Bit Fields:
Enable Channel 3
When this bit is set, the PSG will output the sound from channel 3, the noise channel.

Enable Channel 2
When this bit is set, the PSG will output the sound from channel 2.

Enable Channel 1
When this bit is set, the PSG will output the sound from channel 1.

Enable Channel 0
When this bit is set, the PSG will output the sound from channel 0.

AGAMA Reserved
These bits are reserved for future expansion.

7.2.15 KokinPSG AXR[$14]: Command Buffer Register (CBR)

PSG register writes require two separate single-byte writes. The Command Buffer Register (CBR) contains the information about the last PSG register write command. The low byte of the CBR contains the data byte itself. The high byte of the CBR contains status flags indicating which PSG register is being addressed for the write.

DEFR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Noise Channel Attenuation Register	Noise Channel Control Register	Channel 2 Attenuation Register	Channel 2 Frequency Register	Channel 1 Attenuation Register	Channel 1 Frequency Register	Channel 0 Attenuation Register	Channel 0 Frequency Register
Byte 0	Most recent command byte

Table 7.2.15.a: Bit Fields of the Command Buffer Register (CBR)

Access: READ/WRTIE

Bit Fields:
Noise Channel Attenuation Register
The Noise Channel Attenuation register is being addressed by the current PSG register write command.

Noise Channel Frequency Register
The Noise Channel Frequency Register is being addressed by the current PSG register write command.

Channel 2 Attenuation Register
The Channel 2 Attenuation register is being addressed by the current PSG register write command.

Channel 2 Frequency Register
The Channel 2 Frequency Register is being addressed by the current PSG register write command.

Channel 1 Attenuation Register
The Channel 1 Attenuation register is being addressed by the current PSG register write command.

Channel 1 Frequency Register
The Channel 1 Frequency Register is being addressed by the current PSG register write command.

Channel 0 Attenuation Register
The Channel 0 Attenuation register is being addressed by the current PSG register write command.

Channel 0 Frequency Register
The Channel 0 Frequency Register is being addressed by the current PSG register write command.

Data
The last data byte written to the PSG register write command port.

Reserved
These bits are reserved for future expansion.

7.2.16 KokinPSG AXR[$21]: Register Write Breakpoint Register (RWBR)

This register is used to trigger a KOKINPSG_EVENT_BP_REGISTER_WRITE event when the PSG's registers are written.

RWBR	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
Byte 1	Reserved
Byte 0	Noise Channel Attenuation	Noise Channel Frequency	Channel 2 Attenuation	Channel 2 Frequency	Channel 1 Attenuation	Channel 1 Frequency	Channel 0 Attenuation	Channel 0 Frequency

Table 7.2.16.a: Bit Fields of the Register Write Breakpoint Register (RWBR)

Access: READ/WRITE

Bit Fields:
Noise Channel Attenuation
Set this bit to trigger a KOKINPSG_EVENT_BP_REGISTER_WRITE when the Noise Channel Attenuation Register is written.

Noise Channel Frequency
Set this bit to trigger a KOKINPSG_EVENT_BP_REGISTER_WRITE when the Noise Channel Frequency Register is written.

Channel 2 Attenuation
Set this bit to trigger a KOKINPSG_EVENT_BP_REGISTER_WRITE when the Channel 2 Attenuation Register is written.

Channel 2 Frequency
Set this bit to trigger a KOKINPSG_EVENT_BP_REGISTER_WRITE when the Channel 2 Frequency Register is written.

Channel 1 Attenuation
Set this bit to trigger a KOKINPSG_EVENT_BP_REGISTER_WRITE when the Channel 1 Attenuation Register is written.

Channel 1 Frequency
Set this bit to trigger a KOKINPSG_EVENT_BP_REGISTER_WRITE when the Channel 1 Frequency Register is written.

Channel 0 Attenuation
Set this bit to trigger a KOKINPSG_EVENT_BP_REGISTER_WRITE when the Channel 0 Attenuation Register is written.

Channel 0 Frequency
Set this bit to trigger a KOKINPSG_EVENT_BP_REGISTER_WRITE when the Channel 0 Frequency Register is written.

Reserved
These bits are reserved for future expansion.

7.2.17 KokinPSG AXR[$F0]: Channel 0 Frequency Register (C0FR)

7.2.18 KokinPSG AXR[$F1]: Channel 0 Attenuation Register (C0AR)

7.2.19 KokinPSG AXR[$F2]: Channel 1 Frequency Register (C1FR)

7.2.20 KokinPSG AXR[$F3]: Channel 1 Attenuation Register (C1AR)

7.2.21 KokinPSG AXR[$F4]: Channel 2 Frequency Register (C2FR)

7.2.22 KokinPSG AXR[$F5]: Channel 2 Attenuation Register (C2AR)

7.2.23 KokinPSG AXR[$F6]: Noise Channel Control Register (NCCR)

7.2.24 KokinPSG AXR[$F7]: Noise Channel Attenuation Register (NCAR)

7.3 KokinPSG Events

Event Code	Event Mnemonic
$00 - $03	AGAMA Reserved
$04	KOKINPSG_EVENT_CP_WRITE_READONLY_AXR
$05	KOKINPSG_EVENT_CP_WRITE_READONLY_AXR_BIT
$06	KOKINPSG_EVENT_CP_WRITE_RESERVED_AXR
$07	KOKINPSG_EVENT_CP_READ_READONLY_AXR
$08 - $0F	AGAMA Reserved
$10 - $B0	Reserved
$B1	KOKINPSG_EVENT_BP_REGISTER_WRITE
$B2 - $FF	Reserved

Table 7.3.a: KokinPSG Events

7.3.1 Event[$04] KOKINPSG_EVENT_CP_WRITE_READONLY_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINPSG_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINPSG_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$04]	KOKINPSG_EVENT_CP_WRITE_READONLY_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0004
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

7.3.2 Event[$05] KOKINPSG_EVENT_CP_WRITE_READONLY_AXR_BIT

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINPSG_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINPSG_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$05]	KOKINPSG_EVENT_CP_WRITE_READONLY_AXR_BIT
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0005
	DEAR:	Index of the destination AXR
	DEDR:	A bit-mask of the affected read-only bits
	DEFR:	Current Event Handling Flags (EHFR) for this event

7.3.3 Event[$06] KOKINPSG_EVENT_CP_WRITE_RESERVED_AXR

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINPSG_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINPSG_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$06]	KOKINPSG_EVENT_CP_WRITE_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0006
	DEAR:	Index of the destination AXR
	DEDR:	The write data intended for the destination AXR
	DEFR:	Current Event Handling Flags (EHFR) for this event

7.3.4 Event[$07] KOKINPSG_EVENT_CP_READ_RESERVED_AXR

This event triggers when a read from a reserved AGAMA Extension Register (AXR) is attempted. Since the AXR is reserved noread data is returned. A value of 0 is placed in the DEDR.

This is a compulsory event, so if no handling method is specified for this event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the EHFR for this event is always set as a reminder of this functionality. Any attempt to reset the SHUTDOWN flag in the EHFR will trigger a KOKINPSG_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a compulsory event, it cannot be silenced. Any attempt to set the silent flags in the EHFR for this event will trigger a KOKINPSG_EVENT_CP_WRITE_READONLY_AXR_BIT event.

Event[$07]	KOKINPSG_EVENT_CP_READ_RESERVED_AXR
Type	COMPULSORY
Default Action	SHUTDOWN
Silent Flags	Always 0. This event cannot be silenced.
Device Specific?	No. This event is defined for all AGAMA devices.
Device Event Register Updates	DECR:	$0007
	DEAR:	Index of the destination AXR
	DEDR:	$0000
	DEFR:	Current Event Handling Flags (EHFR) for this event

7.3.5 Event[$B1] KOKINPSG_EVENT_BP_REGISTER_WRITE

This event triggers when write to a PSG register is attempted and that register's breakpoint bit in the Register Write Breakpoint Register (RWBR) has been set. This event is used to implement regsiter write breakpoints by setting the SUSPEND bit in this event's Event Handling Flags Register (EHFR) and when used in conjunction with the RWBR.

Event[$B1]	KOKINPSG_EVENT_BP_REGISTER_WRITE
Type	BREAKPOINT
Default Action	None
Silent Flags	Automatically SET when event triggers. Automatically RESET when current instruction retires.
Device Specific?	Yes.
Device Event Register Updates	DECR:	$00B1
	DEAR:	Bit-mask of affected registers (as defined by RWBR)
	DEDR:	Write data
	DEFR:	Current Event Handling Flags (EHFR) for this event

7.4 KokinPSG Power-On Self Test Codes

Message Code	Message Mnemonic	Description
$01	NO_HUB_FOUND	The KokinPSG device requires access to a HUB device for correct operation. During POST the HUB device pointer was checked and found to be NULL (0). This POST code should never occur when the Kokin DLL is used with a released version of MesaDX. It is only likely to occur in the event that the Kokin DLL is being used (incorrectly) by a third-party.

Appendix A: The KokinPROC Instruction Set

[To Be Completed]

Access:	READ-ONLY
Bit Fields:
Device ID	The 4-bit Device ID for the device.
*AGAMA Reserved*	These bits are reserved for future expansion.

Access:	READ/WRITE
Bit Fields:
Event Code	The Event Code indicates which event the flags in the Event Handling Flags Register (EHFR) correspond to.
*AGAMA Reserved*	These bits are reserved for future expansion.

Access:	READ/WRTIE
Bit Fields:
Enable Channel 3	When this bit is set, the PSG will output the sound from channel 3, the noise channel.
Enable Channel 2	When this bit is set, the PSG will output the sound from channel 2.
Enable Channel 1	When this bit is set, the PSG will output the sound from channel 1.
Enable Channel 0	When this bit is set, the PSG will output the sound from channel 0.
*AGAMA Reserved*	These bits are reserved for future expansion.

Kokin Library User's Manual

Version 0.04.00

Table of Contents

Introduction

I.1 About this Document

I.2 Document Conventions

I.2.1 Hexadecimal and Binary Numbers

I.2.2 Bit and Byte Order

I.2.3 Reserved Bits

I.2.4 Instruction Operands

I.3 Revision History

I.4 Acknowledgements

Chapter1: Kokin Library Overview

Chapter2: Processor (PROC) Devices

2.1 KokinPROC Overview

2.2 KokinPROC AGAMA Extension Registers

2.2.1 KokinPROC AXR[$00]: Device ID Register (DIR)

2.2.2 KokinPROC AXR[$01]: Power-On Configuration Register (POCR)

2.2.3 KokinPROC AXR[$02]: Device Model Register (DMR)

2.2.4 KokinPROC AXR[$03]: Device Version Register (DVR)

2.2.5 KokinPROC AXR[$04]: Device Status Register (DSR)

2.2.6 KokinPROC AXR[$08]: Event Handling Code Register (EHCR)

2.2.7 KokinPROC AXR[$09]: Event Handling Flags Register (EHFR)

2.2.8 KokinPROC AXR[$0A]: Event Monitor Vector Register (EMVR)

2.2.9 KokinPROC AXR[$0C]: Device Event Code Register (DECR)

2.2.10 KokinPROC AXR[$0D]: Device Event Address Register (DEAR)

2.2.11 KokinPROC AXR[$0E]: Device Event Data Register (DEDR)

2.2.12 KokinPROC AXR[$0F]: Device Event Flags Register (DEFR)

2.2.13 KokinPROC AXR[$10]: Device State Update Register (DSUR)

2.2.14 KokinPROC AXR[$11]: Interrupt Status Register (ISR)

2.2.15 KokinPROC AXR[$12]: Last Branch Source Register (LBSR)

2.2.16 KokinPROC AXR[$13]: Last Branch Destination Register (LBDR)

2.2.17 KokinPROC AXR[$14]: Monitor Event Program Counter Register (MEPCR)

2.2.18 KokinPROC AXR[$15]: Monitor Event Stack Pointer Register (MESPR)

2.2.19 KokinPROC AXR[$20]: Register Read Breakpoint Register (RRBR)

2.2.20 KokinPROC AXR[$21]: Register Write Breakpoint Register (RWBR)

2.2.21 KokinPROC AXR[$30]: Memory Attribute Address Register (MAAR)

2.2.22 KokinPROC AXR[$31]: Memory Attribute Data Register (MADR)

2.2.23 KokinPROC AXR[$32]: Port Attribute Address Register (PAAR)

2.2.24 KokinPROC AXR[$33]: Port Attribute Data Register (PADR)

2.3 KokinPROC Events

2.3.1 Event[$04] KOKINPROC_EVENT_CP_WRITE_READONLY_AXR

2.3.2 Event[$05] KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT

2.3.3 Event[$06] KOKINPROC_EVENT_CP_WRITE_RESERVED_AXR

2.3.4 Event[$07] KOKINPROC_EVENT_CP_READ_RESERVED_AXR

2.3.5 Event[$20] KOKINPROC_EVENT_CP_INVALID_INSTR

2.3.6 Event[$80] KOKINPROC_EVENT_BP_INSTR_RETIRE

2.3.7 Event[$81] KOKINPROC_EVENT_BP_UNDOCUMENTED_INSTR

2.3.8 Event[$82] KOKINPROC_EVENT_BP_INCORRECT_RESPONSE_SIZE

2.3.9 Event[$90] KOKINPROC_EVENT_BP_HALT

2.3.10 Event[$91] KOKINPROC_EVENT_BP_JP

2.3.11 Event[$92] KOKINPROC_EVENT_BP_CALL

2.3.12 Event[$93] KOKINPROC_EVENT_BP_RET

2.3.13 Event[$94] KOKINPROC_EVENT_BP_RST

2.3.14 Event[$A1] KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRWRITE

2.3.15 Event[$A2] KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRREAD

2.3.16 Event[$A8] KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMFETCH

2.3.17 Event[$A9] KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMWRITE

2.3.18 Event[$AA] KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMREAD

2.3.19 Event[$AD] KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTOUT

2.3.20 Event[$AE] KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTIN

2.3.21 Event[$B1] KOKINPROC_EVENT_BP_REGISTER_WRITE

2.3.22 Event[$B2] KOKINPROC_EVENT_BP_REGISTER_READ

2.3.23 Event[$B8] KOKINPROC_EVENT_BP_MEMORY_FETCH

2.3.24 Event[$B9] KOKINPROC_EVENT_BP_MEMORY_WRITE

2.3.25 Event[$BA] KOKINPROC_EVENT_BP_MEMORY_READ

2.3.26 Event[$BD] KOKINPROC_EVENT_BP_PORT_OUT

2.3.27 Event[$BE] KOKINPROC_EVENT_BP_PORT_IN

2.4 KokinPROC Power-On Self Test Codes

Chapter 3: Hub (HUB) Devices

3.1 KokinMIOH Overview

3.2 KokinMIOH AGAMA Extension Registers

3.2.1 KokinMIOH AXR[$00]: Device ID Register (DIR)

3.2.2 KokinMIOH AXR[$01]: Power-On Configuration Register (POCR)

3.2.3 KokinMIOH AXR[$02]: Device Model Register (DMR)

3.2.4 KokinMIOH AXR[$03]: Device Version Register (DVR)

3.2.5 KokinMIOH AXR[$04]: Device Status Register (DSR)

3.2.6 KokinMIOH AXR[$08]: Event Handling Code Register (EHCR)

3.2.7 KokinMIOH AXR[$09]: Event Handling Flags Register (EHFR)

3.2.8 KokinMIOH AXR[$0A]: Event Monitor Vector Register (EMVR)