This document assumes some familiarty with the Sega Mark III, Sega Master System (SMS) and Sega Game Gear (GG) game consoles. See the Technical Documents section of S8-Dev for information about these systems.
Binary (Base 2) numbers are represented using the WLA-DX format of the "%"
symbol follwed by a string of binary digits (0 and 1). An example of a valid
binary number representation is: %11100110.
The Sega Mark III Architecture (SM3A) is based on
the Zilog Z80 microprocessor. This microprocessor is a
little-endian machine, meaning that bytes
of a word are numbered starting from the least-significant byte. As a
result, the SM3A and AGAMA extensions are also
little-endian. The least-significant byte in a word will always be stored to
memory first, at the lower address, followed by the most-significant byte at
the higher address.
Diagrams of data structures in memory will have lower memory addresses
towards the bottom of the page, with higher addresses growing towards the top
of the page.
where:
For example:
In this example, LOOP1 is a label, LD is the mnemonic identifier for the
opcode, HL is the destination operand, and STARTVALUE is the source operand.
Note, though, that this specification deviates slightly from Z80 assembly
language with regard to the accumulator (the "A" register). In Z80 assembly
language, certain arithmetic instructions use an implied accumulator operand;
the accumulator is not explicitly specified in the instruction. For example,
the instruction:
Version 0.03.01: (April 2, 2004) Updated to include new Power-On Configuration
bit for SMS1-type bus in the device POCRs. This new POC bit is implemented in
the version of the Kokin.dll included with MesaDX 0.03a
Version 0.03.00 (March 13, 2004): Initial version. Coincides with release of
MesaDX version 0.03
Super Majik Spiral Crew, Jon, and Richard Talbot-Watkins: Their documents
describing the technical details of the Sega Master System and Sega Game Gear
are the foundations of the public's current understanding of these systems.
Andrew Lindsay: Designer of the MK1. His help with the SMS memory system
and ROM storage was invaluable. With this information I was able to design and
build the SMSARCH, a SMS cartridge backup unit.
James McKay: Provided me with my first glimpse of the SMS memory
architecture. Also, for providing miscellaneous information in a (publically
released) e-mail converstation with "Neon Spiral Injector."
Bock (or Zoop or Omar Cornut): Bock has been a strong presence in the
SMS/GG emulation community. His contributions have on many occasions inspired
my own efforts. Additionally, his founding and continuous support of S8-Dev has
been a great service to all of us still interested in software development for
Sega 8-bit systems.
Maxim: Maxim has made numerous contributions to the world of Sega 8-bit
emulation including utilities, demo programs, and technical documents. Maxim
is an active member of the S8-Dev forum and can always be depended on to step
up and answer the difficult technical questions. Maxim also wrote an
outstanding document covering the TI SN76489 sound chip.
Charles MacDonald: Charles' unending work documenting the minutae of the
various Video Display Processors used in various SM3A implementations has been
invaluable during the development of MesaDX. Charles has also written many
test programs and has on several occasions been kind enough to test demo
programs on a real SMS.
Martin Konrad: Martin Konrad is the brains behind the SDSC Debug Console.
He is also the author of an outstanding SMS debugging emulator, eSMS. eSMS is
the first emulator to include an SDSC Debug Console. Hopefully, MesaDX will
be the second.
Heliophobe: Heliophobe has made many technical contributions to Sega
8-bit emulation including demos and a SMS emulator for the Dreamcast: SMEG.
Heliophobe has also provided feedback and suggestions for improving MesaDX,
many of which have been implemented in MesaDX version 0.03.
S8-Dev: All the members of S8-Dev deserve to be thanked, not only for
their continuous interest in Sega 8-bit development, but also for perhaps being
the only people in the world who might be interested in using an emulator
like MesaDX
Quinntesson (Jeff Quinn, my brother, author of the Genesis/SegaCD/32X
emulator AGES): His understanding and interest in the more technical aspects
of emulation have greatly increased my own understanding of emulation. Our long
conversations about all things emulation-related have proved to be invaluable
during the (long) development of MesaDX.
Although 256 registers are available in each device, only 240 of them can be used for
device-specific functions. The first 16 AXRs are pre-defined and have
the same purpose in every AGAMA Device. At the minimum, each AGAMA device must
implement these 16 AXRs. They are described below.
The Device ID Register is one of the registers required by the
AGAMA Specification for all
AGAMA Devices. (Please see the
AGAMA Extension Register (AXR)
Files section in the AGAMA Specification for more information about
required AXRs.
The Power-On Configuration Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
The Device Model Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
The Device Version Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
The Device Status Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
The Event Handling Code Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
The Event Handling Flags Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
The Event Monitor Vector Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
The Device Event Code Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
The Device Event Address Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
The Device Event Data Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
The Device Event Flags Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
This is a compulsory event, so if no handling method is specified for this
event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the
EHFR for this event is always set as a reminder of this
functionality. Any attempt to reset the SHUTDOWN flag in the
EHFR will trigger a
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also,
because this is a compulsory event, it cannot be silenced. Any attempt to set
the silent flags in the EHFR for this event will trigger a
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event.
This is a compulsory event, so if no handling method is specified for this
event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the
EHFR for this event is always set as a reminder of this
functionality. Any attempt to reset the SHUTDOWN flag in the
EHFR will trigger a
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also,
because this is a compulsory event, it cannot be silenced. Any attempt to
set the silent flags in the EHFR for this event will
trigger a KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event.
This is a compulsory event, so if no handling method is specified for this
event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the
EHFR for this event is always set as a reminder of this
functionality. Any attempt to reset the SHUTDOWN flag in the
EHFR will trigger a
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a
compulsory event, it cannot be silenced. Any attempt to set the silent flags
in the EHFR for this event will trigger a
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event.
This is a compulsory event, so if no handling method is specified for this
event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the
EHFR for this event is always set as a reminder of this
functionality. Any attempt to reset the SHUTDOWN flag in the
EHFR will trigger a
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a
compulsory event, it cannot be silenced. Any attempt to set the silent flags
in the EHFR for this event will trigger a
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event.
This is a compulsory event, so if no handling method is specified for this
event then SHUTDOWN will occur automatically. The SHUTDOWN bit in the
EHFR for this event is always set as a reminder of this
functionality. Any attempt to reset the SHUTDOWN flag in the
EHFR will trigger a
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event. Also, because this is a
compulsory event, it cannot be silenced. Any attempt to set the silent flags
in the EHFR for this event will trigger a
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
If the KOKINPROC_EVENT_BP_INCORRECT_RESPONSE_SIZE event ever triggers on a byte transaction
(port in, port out, memory read byte, memory write byte), or an AGAMA Extension
Register (AXR) access transaction (read AXR, write AXR) then there is an
implementation error in whatever devices are responding. The event should
never trigger on any of these types of transactions when KokinPROC is used with
other devices provided in the Kokin DLL. (These devices have been extensively
tested, ensuring that all the responses are valid for the given request type.)
The only time this event should ever trigger (when used with Kokin DLL devices)
is if a memory access crosses a device address boundary, and one device has
been disabled.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
This is a breakpoint event, so if no handling method is specified for this
event then the event is ignored and will not trigger. Also, because this is a
breakpoint event, the appropriate silent flag (depending on the current
operating mode) will automatically be set when the event triggers (this will be
reflected in the DEDR). The silent flag will be cleared
automatically when the current instruction retires.
Although 256 registers are available in each device, only 240 of them can be used
for device-specific functions. The first 16 AXRs are pre-defined and have
the same purpose in every AGAMA Device. At the minimum, each AGAMA device must
implement these 16 AXRs. They are described below.
The Device ID Register is one of the registers required by the
AGAMA Specification for all
AGAMA Devices. (Please see the
AGAMA Extension Register (AXR)
Files section in the AGAMA Specification for more information about
required AXRs.
The Power-On Configuration Register is one of the registers required by the
AGAMA Specification for all
AGAMA Extension Register (AXR) Files
section in the AGAMA Specification for more information about required
AXRs.
I.1 About this Document
[To Be Completed]
I.2 Document Conventions
This document uses a specific notation for hexadecimal and binary numbers,
symbolic representation of instructions, and data-structure formats.
Familiarity with this notation is essential for effective use of the Kokin
Library and MesaDX.
I.2.1 Hexadecimal and Binary Numbers
Hexadecimal (Base 16) numbers are represented using the
WLA-DX format of the "$" symbol followed by a
string of hexadecimal digits (1-9 and A-F). The hexadecimal digits 'A' through
'F' will always be upper-case. An example of a valid hexadecimal number
representation is: $C0FF.
I.2.2 Bit and Byte Order
Bits are numbered starting from right to left, (i.e., least-significant to
most-significant.) All bytes consist of eight bits: 0 through 7.I.2.3 Reserved Bits
In certain register layout descriptions, various bits will be marked as
Reserved. These bits are reserved for future expansion of the
AGAMA specification, and all reserved bits are implicitly RESET (0). Software
should never attempt to SET these bits (to 1). Generally, if the modification
of a read-only or reserved bit is attempted an error will occur and the
entire write to the register will be discarded. Access to registers with
reserved bits should follow the guidelines below:
I.2.4 Instruction Operands
The main processor used in the
Sega Mark III Architecture (SM3A) is the Zilog Z80
microprocessor. Therefore, the symbolic representation of instructions is
taken directly from Z80 assembly language. The format is shown below:
When two operands are present, the right operand is the source and the left
is the destination.LOOP1: LD HL, STARTVALUE
AND B implies the accumulator is both a source
and a destination. In contrast, the assembly language used in this
specification always specifies the accumulator. The same instruction
is written as: AND A, B in this specification. The object codes
for these instructions are identical, just the instruction notation differs.
I.3 Revision History
Version 0.04.00: (September 23, 2006) Updated to correspond to MesaDX 0.04
release. Added KokinCART_A0CD (mapper) and KokinA246 (VDP) devices.
Updated AXR, Event and POST Code lists for all devices.
I.4 Acknowledgements
The Kokin Library and MesaDX could not have existed without the help of numerous people.
[To Be Completed]
Chapter1: Kokin Library Overview
Chapter2: Processor (PROC) Devices
2.1 KokinPROC Overview
2.2 KokinPROC AGAMA Extension Registers
Each AGAMA Device includes a 256-entry 16-bit AGAMA Extension Register (AXR)
file. The AXRs contain device configuration and status information. Both
software and external debuggers can access the AXRs to change device behavior
or to collect device status.
2.2.1 KokinPROC AXR[$00]: Device ID Register (DIR)
The Device ID Register contains the 4-bit Device ID for the KokinPROC device.
The Device ID is assigned on Power-On and is used to address the KokinPROC
during certain types of bus transactions, such as AXR reads and writes.
Table 2.2.1.a: Bit Fields of the Device ID Register (DIR)
DIR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 AGAMA Reserved
Byte 0 AGAMA Reserved
Device ID[3:0]
Access:
READ-ONLY
Bit Fields:
The 4-bit Device ID for the device.
These bits are reserved for future expansion.
2.2.2 KokinPROC AXR[$01]: Power-On Configuration Register (POCR)
The Power-On Configuration Register contains the initial configuration
settings of the KokinPROC device. The KokinPROC device will sample all the
configuration settings and save them in the POCR, but not all the settings are
used. The bit field descriptions below indicate which Power-On Configuration
settings are ignored by the KokinPROC device.
Table 2.2.2.a: Bit Fields of the Power-On Configuration Register (POCR)
POCR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 POST Code
AGAMA Reserved Monitor Mode Suspended
Byte 0 GG Mode Export Region 50Hz
AGAMA Reserved SMS1 Bus Lock Boot Device
Boot Device
Access:
READ-ONLY
Bit Fields:
A 4-bit code indicating the result of the
Power-On Self Test (POST) for the
KokinPROC device. A zero value indicates that the device passed POST.
A non-zero value indicates a failure. A list of the KokinPROC POST
failure codes, along with detailed descriptions for each code, can be
found in Appendix B: Power-On Self Test (POST)
Code Summary
If this bit is set, the KokinPROC device powered-on in
Monitor Mode. Otherwise,
the KokinPROC device powered-on in
Compatible Mode. Monitor mode
is disabled in the current release of the Kokin Library, so this bit
will always be reset (0).
If this bit is set, the KokinPROC device powered-on
suspended. If not set, the KokinPROC
device powered-on resumed and
immediately began fetching and executing instructions.
The KokinPROC device ignores this bit since its operation is
independent of the SMS or GG operating modes.
The KokinPROC device ignores this bit since its operation is
independent of the region setting of the machine.
The KokinPROC device uses this bit to determine how many instructions
to execute during a single scanline. (MesaDX currently uses a single
scanline as the smallest unit of emulation time.)
The KokinPROC device uses this bit to correctly emulate the
operation of a SMS1 Bus. A SMS1 Bus retains the previously
driven data value. In contrast SMS2/GG busses return $FF if no
data value is driven on the bus.
The KokinPROC device ignores this bit.
The KokinPROC device ignores these bits since its operation is
independent of the initial boot device.
These bits are reserved for future expansion.
2.2.3 KokinPROC AXR[$02]: Device Model Register (DMR)
The Device Model Register contains the KokinPROC device's model number: A080.
The 'A' indicates that the KokinPROC is an
AGAMA Device, and the '080' indicates
compatiblity with the Zilog Z80 microprocessor.
Table 2.2.3.a: Bit Fields of the Device Model Register (DMR)
DMR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Model Number
Byte 0 Model Number
Access:
READ-ONLY
Bit Fields:
The KokinPROC device's model number. The current model number for
this device is A080.
2.2.4 KokinPROC AXR[$03]: Device Version Register (DVR)
The Device Version Register specifies the implementation version of the
KokinPROC device. Currently, the version number is 00.00 for all devices
in the Kokin library.
Table 2.2.4.a: Bit Fields of the Device Version Register (DVR)
DVR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Major Version
Byte 0 Minor Version
Access:
READ-ONLY
Bit Fields:
The major version number of the device implementation.
The minor version number of the device implementation.
2.2.5 KokinPROC AXR[$04]: Device Status Register (DSR)
The Device Status Register contains general information about the
KokinPROC device's current state.
Table 2.2.5.a: Bit Fields of the Device Status Register (DSR)
DSR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Compatible Silent Set Monitor Silent Set
Global Compatible Silent Set
Global Monitor Silent Set Device Enabled
Shutdown Monitor Mode Suspended
Byte 0 Halted Reserved
Access:
READ-ONLY
Bit Fields:
A COMPATBILESILENT flag is set in one of the KokinPROC device's
EHFR registers. If this bit is set and the KokinPROC device is in
Compatible Mode when it
receives a CLEARSILENTFLAGS message then the
COMPATIBLESILENT and MONITORSILENT flags in all of the
EHFR registers are reset. See the Event Handling Flags
Register (EHFR) section for more information about the
SILENT flags.
A MONITORSILENT flag is set if one of the KokinPROC device's
EHFR registers. If this bit is set and the device is in
Monitor Mode when it receives a
CLEARSILENTFLAGS message then the MONITORSILENT flags in
all of the EHFR registers are reset. See the Event
Handling Flags Register (EHFR) section for more information about
the SILENT flags.
A COMPATBILESILENT flag is set in one of any of the system
device's EHFR registers. If this bit is set and the KokinPROC device is
in Compatible Mode then it
must issue a CLEARSILENTFLAGS message when the current
instruction retires. This ensures that specific breakpoint will only
trigger once per instruction.
A MONITORSILENT flag is set in one of any of the system
device's EHFR registers. If this bit is set and the KokinPROC device is
in Monitor Mode then it
must issue a CLEARSILENTFLAGS message when the current
instruction retires. This ensures that specific breakpoint will only
trigger once per instruction.
The KokinPROC device is enabled. This bit is always set in this
version of the KokinPROC implementation.
The KokinPROC device has entered
Shutdown. The KokinPROC device will
no longer respond to bus transactions, other than SYSMESSAGE
transactions, and will not fetch or execute instructions.
A Power-On (Hard-Reset) is required to bring the KokinPROC device and
the rest of the system out of shutdown.
The KokinPROC device is operating in
Monitor Mode. All Monitor Mode
functionality has been disabled in this release of the Kokin library,
so this bit will always be reset (0).
The KokinPROC device has suspended.
The device will still respond to bus traffic, but will not perform any
"active" processing such as fetching and executing instructions.
This bit is set if the KokinPROC device just executed a HALT
instruction. This bit is required to correctly emulated the behavior
of interrupts during a HALT instruction.
These bits are reserved for future expansion.
2.2.6 KokinPROC AXR[$08]: Event Handling Code Register (EHCR)
The Event Handling Code Register is used to control the data appearing in the
Event Handling Flags Register (EHFR). Together, the EHCR
and EHFR control the access to the event flags that indicate how an event should
be handled when it occurs. The event flags in the EHFR correspond to the event
code in the EHCR. Writing a new event code to the EHCR will update the EHFR
with that event's flags which can then be modified via the EHFR. The event
codes for the KokinPROC device can be found in Appendix
C: Event Code Summary.
Table 2.2.6.a: Bit Fields of the Event Handling Code Register (EHCR)
EHCR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 AGAMA Reserved
Byte 0 Event Code
Access:
READ/WRITE
Bit Fields:
The Event Code indicates which event the flags in the Event Handling
Flags Register (EHFR) correspond to.
These bits are reserved for future expansion.
2.2.7 KokinPROC AXR[$09]: Event Handling Flags Register (EHFR)
The Event Handling Flags Register is a window into the 256-entry event flags
table. Together, the EHCR and EHFR control the access to the event flags that
indicate how an event should be handled when it occurs. The event flags in the
EHFR correspond to the event code in the EHCR. Writing a new event code to the
EHCR will update the EHFR with that event's flags which can then be modified via
the EHFR.
Table 2.2.7.a: Bit Fields of the Event Handling Flags Register (EHFR)
EHFR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Compatible Silent Monitor Silent
AGAMA Reserved Shutdown Monitor Mode Suspend
Byte 0 AGAMA Reserved
Access:
READ/WRITE
Bit Fields:
If this bit is set, then the event (whose code is specified in the EHCR)
will be silenced (and will not trigger) the next time it occurs while
the KokinPROC device is in
Compatible Mode. (Note:
Compulsory Events, cannot be silenced.
Please see the section on
Events and Event
Handling in the AGAMA Specification for more information about the
different types of device events.) This bit is used as a flag for events
so that they only trigger once during the execution of an instruction.
When the KokinPROC device receives a CLEARSILENTFLAGS message
while in Compatible Mode, this bit (along with the Monitor Silent bit)
is cleared for all 256 events. If the device is in Monitor Mode, this
bit is not affected by a CLEARSILENTFLAGS message.
If this bit is set, then the event (whose code is specified in the EHCR)
will be silenced (and will not trigger) the next time it occurs while
the KokinPROC device is in
Compatible Mode. (Note:
Compulsory Events, cannot be silenced.
Please see the section on
Events and Event
Handling in the AGAMA Specification for more information about the
different types of device events.) This bit is used as a flag for events
so that they only trigger once during the execution of an instruction.
When the KokinPROC device receives a CLEARSILENTFLAGS message
while in Monitor Mode, this bit is cleared for all 256 events.
Setting this bit indicates that the system should enter
Shutdown mode when the event triggers.
This flag is only examined if no other event handling flag is set
(such as Monitor Mode or Suspend described below).
Shutdown mode is used when an error or event occurs and no error
recovery is possible. For example, if the KokinPROC device encounters
an unknown opcode the system may enter shutdown if no other event
handling is specified. For Events and
Event Handling for more information about shutdown and the
different types of device events.
Setting this bit indicates that the system should enter
Monitor Mode when the event
triggers. This bit is read-only for all devices in this version of the
Kokin Library.
Setting this bit indicates that the system should
suspend execution when the event
triggers.
These bits are reserved for future expansion.
2.2.8 KokinPROC AXR[$0A]: Event Monitor Vector Register (EMVR)
The Event Monitor Vector Register (EMVR) contains the address of the KokinPROC
device's Monitor Mode handler. When a device event triggers and the Monitor
Mode event flag is set, the device will request that the system
enter Monitor Mode and program flow will jump to the address specified in this
register. Monitor mode is not available in the current release of the Kokin
Library, so this register is not used, but it can be written to.
Table 2.2.8.a: Bit Fields of the Event Monitor Vector Register (EMVR)
EMVR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Monitor Vector Address[15:8]
Byte 0 Monitor Vector Address[7:0]
Access:
READ/WRITE
Bit Fields:
The address of the KokinPROC device's Monitor Mode handler.
2.2.9 KokinPROC AXR[$0C]: Device Event Code Register (DECR)
The Device Event Code Register (DECR) contains the 8-bit event code of the
last event that triggered. This register will retain its value until another
event is triggered. Silenced events do not trigger and will not update this
register. Other information about the last triggered event can be found in the
Device Event Address Register (DEAR),
Device Event Data Register (DEDR), and
Device Event Flags Register (DEFR),
Table 2.2.9.a: Bit Fields of the Device Event Code Register (DECR)
DECR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 AGAMA Reserved
Byte 0 Event Code
Access:
READ-ONLY
Bit Fields:
The 8-bit event code for the last triggered event.
These bits are reserved for future expansion.
2.2.10 KokinPROC AXR[$0D]: Device Event Address Register (DEAR)
The Device Event Address Register (DEAR) contains the 16-bit address (or 8-bit
port) specific to the last event that triggered. For example, if a memory
write event triggered, then this register will contain the address the data
was to be written to. This register will retain its value until another event
is triggered. Silenced events do not trigger and will not update this
register. Other information about the last triggered event can be found in the
Device Event Code Register (DECR),
Device Event Data Register (DEDR), and
Device Event Flags Register (DEFR),
Table 2.2.10.a: Bit Fields of the Device Event Address Register (DEAR)
DEAR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Event-specific Address[15:8]
Byte 0 Event-specific Address[7:0]
Access:
READ-ONLY
Bit Fields:
A 16-bit address (or 8-bit port) specific to the event that triggered.
For example, if a memory write event was triggered then this register
will contain the address the data was to be written to. This register
retains its value until another event is triggered.
2.2.11 KokinPROC AXR[$0E]: Device Event Data Register (DEDR)
The Device Event Data Register (DEDR) contains data specific to the last event
that triggered. For example, if a memory write event triggered, then this
register will contain the write data. This register will retain its value
until another event is triggered. Silenced events do not trigger and will not
update this register. Other information about the last triggered event can be
found in the
Device Event Code Register (DECR),
Device Event Address Register (DEAR), and
Device Event Flags Register (DEFR),
Table 2.2.11.a: Bit Fields of the Device Event Data Register (DEDR)
DEDR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Event-specific Data[15:8]
Byte 0 Event-specific Data[7:0]
Access:
READ-ONLY
Bit Fields:
16-bits of data specific to the event that triggered. For example, if a
memory write event was triggered then this register will contain the
write data. This register retains its value until another event is
triggered.
2.2.12 KokinPROC AXR[$0F]: Device Event Flags Register (DEFR)
The Device Event Flags Register (DEFR) contains a copy of the
Event Handling Flags Register (EHFR) for the event that
triggered. This register will retain its value until another event
is triggered. Silenced events do not trigger and will not update this
register. Other information about the last triggered event can be found in the
Device Event Code Register (DECR),
Device Event Address Register (DEAR), and
Device Event Data Register (DEDR),
Table 2.2.12.a: Bit Fields of the Device Event Flags Register (DEFR)
DEFR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Compatible Silent Monitor Silent
AGAMA Reserved Shutdown Monitor Mode Suspend
Byte 0 AGAMA Reserved
Access:
READ-ONLY
Bit Fields:
The Compatible Silent flag is set for the triggered event.
The next time this event occurs while the KokinPROC device is in
Compatible Mode the event will be silenced and will not trigger.
See the section on the Event Handling Flag Register
(EHFR) for more information about this bit.
The Monitor Silent flag is set for the triggered event.
The next time this event occurs while the KokinPROC device is in
Monitor Mode the event will be silenced and will not trigger. See the
section on the Event Handling Flag Register (EHFR)
for more information about this bit.
The Shutdown flag is set for the triggered event, indicating
that one possible mechanism for handling the event was to enter
Shutdown mode. See the section on
the Event Handling Flag Register (EHFR) for more
information about this bit.
The Monitor Mode flag is set for the triggered event, indicating
that one possible mechanism for handling the event was to enter
Monitor Mode. See the section on
the Event Handling Flag Register (EHFR) for more
information about this bit.
The Suspend flag is set for the triggered event, indicating
that one possible mechanism for handling the event was to
suspend execution. See the section on
the Event Handling Flag Register (EHFR) for more
information about this bit.
These bits are reserved for future expansion.
2.2.13 KokinPROC AXR[$10]: Device State Update Register (DSUR)
This register is not implemented in this version of KokinPROC.
2.2.14 KokinPROC AXR[$11]: Interrupt Status Register (ISR)
This register contains information about pending INTs and NMIs, and whether
interrupts are enabled.
Table 2.2.14.a: Bit Fields of the CPU's Interrupt Status Register (ISR)
ISR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Reserved
Byte 0 INT Acknowledge Pending INT Pending
INT Accept INT Enable NMI Acknowledge Pending NMI Pending
NMI Accept NMI Enable
Access:
READ-ONLY
Bit Fields:
This bit is used by the processor to determine if an INT is pending.
During normal execution, this bit is equal to INT Pending. However,
during an NMI this bit is RESET, thus preventing the
processor from acknowledging the INT. Upon RETN from an NMI
handler INT Pending is copied into this bit. If an
INT was pending, the processor will now acknowledge it.
Indicates that an INT is pending.
When set, this bit indicates that INT's can be accepted. It is always
equal to INT Enable, except during execution of NMI.
This bit corresponds to IFF1 in a real Z80 processor.
Enables INTs. This bit is set with EI and cleared with DI.
It corresponds to IFF2 in a real Z80 processor.
This bit only has meaning in Monitor Mode. The
current version of MesaDX does not implement Monitor Mode.
This bit only has meaning in Monitor Mode. The current version of
MesaDX does not implement Monitor Mode.
This bit only has meaning in Monitor Mode. The current version of
MesaDX does not implement Monitor Mode.
This bit only has meaning in Monitor Mode. The current version of
MesaDX does not implement Monitor Mode.
These bits are reserved for future expansion.
2.2.15 KokinPROC AXR[$12]: Last Branch Source Register (LBSR)
This register contains the PC where the most-recently-executed branch (JP, JR,
CALL, RET) was executed.
Table 2.2.15.a: Bit Fields of the CPU's Last Branch Source Register
(LBSR)
LBSR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 PC [15:8]
Byte 0 PC [7:0]
Access:
READ-ONLY
Bit Fields:
PC of the most-recently-executed branch instruction.
2.2.16 KokinPROC AXR[$13]: Last Branch Destination Register (LBDR)
Destination address of the most-recently-executed branch (JP, JR,
CALL, RET) instruction.
Table 2.2.16.a: Bit Fields of the CPU's Last Branch Destination Register
(LBDR)
LBDR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 PC [15:8]
Byte 0 PC [7:0]
Access:
READ-ONLY
Bit Fields:
Destination address of the most-recently-executed branch instruction.
2.2.17 KokinPROC AXR[$14]: Monitor Event Program Counter Register (MEPCR)
This MEPCR is only used during Monitor Mode, which is not implemented in this version of
MesaDX. This register is Read-Only.
2.2.18 KokinPROC AXR[$15]: Monitor Event Stack Pointer Register (MESPR)
This MESPR is only used during Monitor Mode, which is not implemented in this version of
MesaDX. This register is Read-Only.
2.2.19 KokinPROC AXR[$20]: Register Read Breakpoint Register (RRBR)
This register is used to trigger REGISTER_READ events when the PROC's
general-purpose registers are read. REGISTER_READ events don't exist for
the PC or R registers since their values change with every instruction.
Table 2.2.19.a: Bit Fields of the CPU's Register Read Breakpoint Register
(RRBR)
RRBR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 AFP HLP DEP BCP IY IX SP I
Byte 0 A F L H E D C B
Access:
READ/WRITE
Bit Fields:
Set this bit to trigger a REGISTER_READ event whenever the AF' register
is read.
Set this bit to trigger a REGISTER_READ event whenever the HL' register
is read.
Set this bit to trigger a REGISTER_READ event whenever the DE' register
is read.
Set this bit to trigger a REGISTER_READ event whenever the BC' register
is read.
Set this bit to trigger a REGISTER_READ event whenever the IY' register
is read.
Set this bit to trigger a REGISTER_READ event whenever the IX' register
is read.
Set this bit to trigger a REGISTER_READ event whenever the SP' register
is read.
Set this bit to trigger a REGISTER_READ event whenever the I register
is read.
Set this bit to trigger a REGISTER_READ event whenever the A register
is read.
Set this bit to trigger a REGISTER_READ event whenever the F register
is read.
Set this bit to trigger a REGISTER_READ event whenever the L register
is read.
Set this bit to trigger a REGISTER_READ event whenever the H register
is read.
Set this bit to trigger a REGISTER_READ event whenever the E register
is read.
Set this bit to trigger a REGISTER_READ event whenever the D register
is read.
Set this bit to trigger a REGISTER_READ event whenever the C register
is read.
Set this bit to trigger a REGISTER_READ event whenever the B register
is read.
2.2.20 KokinPROC AXR[$21]: Register Write Breakpoint Register (RWBR)
This register is used to trigger REGISTER_WRITE events when the PROC's
general-purpose registers are written to. REGISTER_WRITE events don't exist for
the PC or R registers since their values change with every instruction.
Table 2.2.20.a: Bit Fields of the CPU's Register Write Breakpoint
Register (RWBR)
RWBR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 AFP HLP DEP BCP IY IX SP I
Byte 0 A F L H E D C B
Access:
READ/WRITE
Bit Fields:
Set this bit to trigger a REGISTER_WRITE event whenever the AF' register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the HL' register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the DE' register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the BC' register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the IY' register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the IX' register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the SP' register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the I register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the A register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the F register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the L register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the H register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the E register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the D register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the C register
is written.
Set this bit to trigger a REGISTER_WRITE event whenever the B register
is written.
2.2.21 KokinPROC AXR[$30]: Memory Attribute Address Register (MAAR)
The MAAR is used to index the memory attribute data (available in the
MADR). Memory attribute data is stored for every memory address.
The address in the MAAR indicates the address whose attribute data is
displayed in the MADR.
Table 2.2.21.a: Bit Fields of the CPU's Memory Attribute Address Register
(MAAR)
MAAR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Address [15:8]
Byte 0 Address [7:0]
Access:
READ/WRITE
Bit Fields:
Memory address whose attributes should be displayed in the MADR.
2.2.22 KokinPROC AXR[$31]: Memory Attribute Data Register (MADR)
The attributes for the memory byte indicated in the MAAR. To set an
event to trigger for a specific address access, first place the desired memory
address in the MAAR. Next, set the bits representing the type of event
you want based on the bit positions in the table below.
Table 2.2.22.a: Bit Fields of the CPU's Memory Attribute Data Register
(MADR)
MADR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Reserved
Byte 0 Reserved Read Event
Write Event Fetch Event
Access:
READ/WRITE
Bit Fields:
Set this bit to trigger a MEMORY_READ event when the specified address
is read from.
Set this bit to trigger a MEMORY_WRITE event when the specified address
is written to.
Set this bit to trigger a MEMORY_FETCH event when an instruction is
fetched from the specified address. Note that if any byte of the
instruction (not just the first byte) occurs at this address, an
event will trigger.
These bits are reserved for future expansion.
2.2.23 KokinPROC AXR[$32]: Port Attribute Address Register (PAAR)
The PAAR is used to index the port attribute data (available in the
PADR). Port attribute data is stored for every I/O port.
The port number in the PAAR indicates the port whose attribute data is
displayed in the PADR.
Table 2.2.23.a: Bit Fields of the CPU's Port Attribute Address Register
(PAAR)
PAAR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Reserved
Byte 0 Port [7:0]
Access:
READ/WRITE
Bit Fields:
Number of the port whose attributes should be displayed in the PADR.
2.2.24 KokinPROC AXR[$33]: Port Attribute Data Register (PADR)
The attributes for the port indicated in the PAAR. To set an event to
trigger for the specific port access, first place the desired port address
in the PAAR. Next, set the bits representing the type of event you wnat
based on the bit positions in the table below.
Table 2.2.24.a: Bit Fields of the Port Attribute Data Register
(PADR)
PADR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 Reserved
Byte 0 Reserved Port In Event
Port Out Event Reserved
Access:
READ/WRITE
Bit Fields:
Set this bit to trigger a PORT_IN event when the specified port is
read from.
Set this bit to trigger a PORT_OUT event when the specified port is
written to.
These bits are reserved for future expansion.
2.3 KokinPROC Events
2.3.1 Event[$04] KOKINPROC_EVENT_CP_WRITE_READONLY_AXR
This event triggers when a write to a read-only
AGAMA Extension Register (AXR)
is attempted. The write attempt is ignored, and the destination AXR value does
not change. The write data is placed in the DEDR when
this event triggers.
$04 KOKINPROC_EVENT_CP_WRITE_READONLY_AXR
Type COMPULSORY
Default Action SHUTDOWN
Silent Flags Always 0. This event cannot be silenced.
Device Specific?
No. This event is defined for all AGAMA devices.
Device Event
Register Updates
DECR: $0004
DEAR: Index of the destination AXR
DEDR: The write data intended for the destination AXR
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.2 Event[$05] KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT
This event triggers when a write (that would change the state) of one or more
read-only bits in an
AGAMA Extension Register (AXR)
is attempted. Even though some bits in the AXR may be writable, none will be
updated at all if this event triggers (all write data is discarded). A
bit-mask of the read-only bits that would have been affected will be placed in
the DEDR.
$05
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT
Type COMPULSORY
Default Action SHUTDOWN
Silent Flags Always 0. This event cannot be silenced.
Device Specific?
No. This event is defined for all AGAMA devices.
Device Event
Register Updates
DECR: $0005
DEAR: Index of the destination AXR
DEDR: A bit-mask of the affected read-only bits
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.3 Event[$06] KOKINPROC_EVENT_CP_WRITE_RESERVED_AXR
This event triggers when a write to a reserved
AGAMA Extension Register (AXR)
is attempted. The write attempt is ignored, and the destination AXR value does
not change. The write data is placed in the DEDR when
this event triggers.
$06
KOKINPROC_EVENT_CP_WRITE_RESERVED_AXR
Type COMPULSORY
Default Action SHUTDOWN
Silent Flags Always 0. This event cannot be silenced.
Device Specific?
No. This event is defined for all AGAMA devices.
Device Event
Register Updates
DECR: $0006
DEAR: Index of the destination AXR
DEDR: The write data intended for the destination AXR
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.4 Event[$07] KOKINPROC_EVENT_CP_READ_RESERVED_AXR
This event triggers when a read from a reserved
AGAMA Extension Register (AXR)
is attempted. Since the AXR is reserved noread data is returned. A value of 0
is placed in the DEDR.
$07
KOKINPROC_EVENT_CP_READ_RESERVED_AXR
Type COMPULSORY
Default Action SHUTDOWN
Silent Flags Always 0. This event cannot be silenced.
Device Specific?
No. This event is defined for all AGAMA devices.
Device Event
Register Updates
DECR: $0007
DEAR: Index of the destination AXR
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.5 Event[$20] KOKINPROC_EVENT_CP_INVALID_INSTR
This event triggers when an invalid instruction (opcode) is encountered. An
invalid instruction is either one that is truly not part of the Z80 instruction
set (excluding the so-called "undocumented opcodes" which are mostly
implemented), or one that is not yet emulated (deliberately or by some
oversight on the part of the author). The Program Counter (PC) is not updated
if this event triggers. The PC will stay pointed to the invalid instruction.
See Appendix A for a complete list of the instructions
supported by the KokinPROC device.
$20
KOKINPROC_EVENT_CP_INVALID_INSTR
Type COMPULSORY
Default Action SHUTDOWN
Silent Flags Always 0. This event cannot be silenced.
Device Specific?
Yes
Device Event
Register Updates
DECR: $0020
DEAR: PC of the invalid instruction
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.6 Event[$80] KOKINPROC_EVENT_BP_INSTR_RETIRE
This event triggers when an instruction retires. This event is primarily used
to enable single-stepping through the instruction stream as this event can
trigger after every instruction completion. This is the only breakpoint-type
event in KokinPROC that cannot be silenced. Attempting to set the silence
flags in the EHFR for this event will trigger a
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BIT event.
$80
KOKINPROC_EVENT_BP_INSTR_RETIRE
Type BREAKPOINT
Default Action None
Silent Flags Always 0. This event cannot be silenced.
Device Specific?
Yes
Device Event
Register Updates
DECR: $0080
DEAR: PC of the retired instruction
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.7 Event[$81] KOKINPROC_EVENT_BP_UNDOCUMENTED_INSTR
This event triggers when an undocumented instruction is encountered. The event
will trigger before the instruction is executed, so the Program Counter
(PC) will still point to the undocumented instruction. This event can be used
to find instructions that are supported in the Z80 Instruction Set, but are not
officially documented in the Z80 specification. KokinPROC implements most of
the known undocumented instructions. See Appendix A
for a complete list of the instructions supported by the KokinPROC device,
including those that are considered to be 'undocumented' and can trigger this
event.
$81
KOKINPROC_EVENT_BP_UNDOCUMENTED_INSTR
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $0081
DEAR: PC of the undocumented instruction
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.8 Event[$82] KOKINPROC_EVENT_BP_INCORRECT_RESPONSE_SIZE
This event triggers when a bus request made by the KokinPROC recieves the
incorrect response size. For example, if the KokinPROC issues a MEM_READ_WORD,
then it expects a response indicating two bytes are being returned. Though
this event can theoretically be triggered for any bus request type, it will
generally only trigger for multi-byte memory requests (read word, write word,
instruction fetch). The reason is that such memory accesses can cross an
address boundary where two different devices (e.g., cartridge ROM and System
RAM) should respond, but only one does (probably because the other has been
disabled). If no devices respond, then a separate group of events called
KOKINPROC_EVENT_BP_NORESPONSE_ON_* will trigger, depending on the original bus request type.
(These events are described below.)
$82
KOKINPROC_EVENT_BP_INCORRECT_RESPONSE_SIZE
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $0082
DEAR: Address associated with the original request
DEDR: Data associated with the original request
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.9 Event[$90] KOKINPROC_EVENT_BP_HALT
This event triggers when a HALT instruction is encountered, but before the HALT
instruction executes. This event is one of several that can be used to set
breakpoints for specific types of instructions.
$90
KOKINPROC_EVENT_BP_HALT
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $0090
DEAR: Current PC (pointing to HALT instruction)
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.10 Event[$91] KOKINPROC_EVENT_BP_JP
This event triggers when a "Jump" instruction (conditional or unconditional) is
encountered. The event occurs before the instruction is executed, so the PC
still points to the jump, and not the jump destination. This event is one of
several that can be used to set breakpoints for specific types of instructions.
$91
KOKINPROC_EVENT_BP_JP
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $0091
DEAR: Current PC (pointing to Jump instruction)
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.11 Event[$92] KOKINPROC_EVENT_BP_CALL
This event triggers when a CALL instruction (conditional or unconditional) is
encountered. The event occurs before the instruction is executed, so the PC
still points to the CALL, and not the call destination. This event is one of
several that can be used to set breakpoints for specific types of instructions.
$92
KOKINPROC_EVENT_BP_CALL
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $0092
DEAR: Current PC (pointing to CALL instruction)
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.12 Event[$93] KOKINPROC_EVENT_BP_RET
This event triggers when a RET instruction (conditional or unconditional) is
encountered. The event occurs before the instruction is executed, so the PC
still points to the RET, and not the return destination. This event is one of
several that can be used to set breakpoints for specific types of instructions.
$93
KOKINPROC_EVENT_BP_RET
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $0093
DEAR: Current PC (pointing to RET instruction)
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.13 Event[$94] KOKINPROC_EVENT_BP_RST
This event triggers when a RST instruction is encountered. The event occurs
before the instruction is executed, so the PC still points to the RST, and not
the reset destination. This event is one of several that can be used to set
breakpoints for specific types of instructions.
$94
KOKINPROC_EVENT_BP_RST
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $0094
DEAR: Current PC (pointing to RST instruction)
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.14 Event[$A1] KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRWRITE
This event triggers when an AXR write is attempted, and there is no response
for the transaction. This event will not trigger in the event that the
target device's AXR was read-only or contained read-only bits. In that case,
the target device will signal an event (because the KOKINPROC_EVENT_CP_WRITE_READONLY_AXR,
KOKINPROC_EVENT_CP_WRITE_READONLY_AXR_BITS and KOKINPROC_EVENT_CP_WRITE_RESERVED_AXR events are compulsory in
all AGAMA devices). This signal will be included as part of the response to
KokinPROC, so this NORESPONSE event is not applicable. This event can be used
to set breakpoints for AXR writes that may not complete correctly due to the
target device being disabled.
$A1
KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRWRITE
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00A1
DEAR: Bits[15:8]: Target Device ID,
Bits[7:0]: Index of the destination AXR
Current PC (pointing to RST instruction)
DEDR: The write data intended for the destination AXR
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.15 Event[$A2] KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRREAD
This event triggers when an AXR read is attempted, but there is no response
for the transaction. This event will not trigger in the event that the
target device's AXR is a reserved AXR. In that case, the target device will
signal an event (because the KOKINPROC_EVENT_CP_READ_RESERVED_AXR event is compulsory in all
AGAMA devices). This signal will be included as part of the response to
KokinPROC, so this NORESPONSE event is not applicable. This event can be used
to set breakpoints for AXR reads that may not complete correctly due to the
target device being disabled.
$A2
KOKINPROC_EVENT_BP_NORESPONSE_ON_AXRREAD
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00A2
DEAR: Bits[15:8]: Target Device ID,
Bits[7:0]: Index of the destination AXR
DEDR: Undriven Bus Data ($FFFF)
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.16 Event[$A8] KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMFETCH
This event triggers when an instruction fetch is attempted, but there is no
response for the transaction. This event can be used to set breakpoints for
instruction fetches that may not complete correctly due to the device that
would normally resond to requests made in the addressed range being disabled.
$A8
KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMFETCH
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00A8
DEAR: Current PC (address of fetch)
DEDR: Undriven Bus Data ($FFFF)
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.17 Event[$A9] KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMWRITE
This event triggers when a memory write is attempted, but there is no response
for the transaction. This event can be used to set breakpoints for memory
writes that may not complete correctly due to the device that would normally
respond to requests made in the addressed range being disabled.
$A9
KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMWRITE
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00A9
DEAR: Target address
DEDR: Write data
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.18 Event[$AA] KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMREAD
This event triggers when a memory read is attempted, but there is no response
for the transaction. This event can be used to set breakpoints for memory
reads that may not complete correctly due to the device that would normally
respond to requests made in the addressed range being disabled.
$AA
KOKINPROC_EVENT_BP_NORESPONSE_ON_MEMREAD
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00AA
DEAR: Target address
DEDR: Undriven Bus Data ($FFFF)
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.19 Event[$AD] KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTOUT
This event triggers when a port out write is attempted, but there is no
response for the transaction. This event can be used to set breakpoints for
I/O port writes that may not complete correctly due to the device that would
normally respond to requests made in the addressed range being disabled.
$AD
KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTOUT
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00AD
DEAR: Target port
DEDR: Write out data
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.20 Event[$AE] KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTIN
This event triggers when a port in read is attempted, but there is no response
for the transaction. This event can be used to set breakpoints for I/O port
reads that may not complete correctly due to the device that would normally
respond to requests made in the addressed range being disabled.
$AE
KOKINPROC_EVENT_BP_NORESPONSE_ON_PORTIN
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00AE
DEAR: Target port
DEDR: Undriven Bus Data ($FFFF)
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.21 Event[$B1] KOKINPROC_EVENT_BP_REGISTER_WRITE
This event triggers when a write to a general-purpose (Z80 architectural)
register is attempted, and that register's breakpoint bit in the Register Write
Breakpoint Register (RWBR) has been set. This event is used to implement
register write breakpoints by setting the SUSPEND bit in this event's Event
Handling Flags Register (EHFR), and when used in conjunction with the RWBR.
$B1
KOKINPROC_EVENT_BP_REGISTER_WRITE
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00B1
DEAR: Bit-mask of affected registers (as defined by RWBR)
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.22 Event[$B2] KOKINPROC_EVENT_BP_REGISTER_READ
This event triggers when a read from a general-purpose (Z80 architectural)
register is attempted, and that register's breakpoint bit in the Register Read
Breakpoint Register (RRBR) has been set. This event is used to implement
register read breakpoints by setting the SUSPEND bit in this event's Event
Handling Flags Register (EHFR), and when used in conjunction with the RRBR.
$B2
KOKINPROC_EVENT_BP_REGISTER_READ
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00B2
DEAR: Bit-mask of affected registers (as defined by RRBR)
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.23 Event[$B8] KOKINPROC_EVENT_BP_MEMORY_FETCH
This event triggers when an instruction fetch from memory is attempted and the
'Fetch Event' bit is set in the Memory Attribute Data Register (MADR) for any
of the accessed memory addresses. This means that with a multi-byte
instruction, the event can trigger on any of the bytes that make up the
instruction. For example, if the 4-byte instruction BIT 0, (IX) is located
at address $4000, then this event would trigger if the 'Fetch Event' bits were
set for any combination of the addresses from $4000 through $4003.
$B8
KOKINPROC_EVENT_BP_MEMORY_FETCH
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00B8
DEAR: Target address (fetch address, current PC)
DEDR: $0000
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.24 Event[$B9] KOKINPROC_EVENT_BP_MEMORY_WRITE
This event triggers when a memory write is attempted and the 'Write Event' bit
is set in the Memory Attribute Data Register (MADR) for any of the accessed
memory addresses. This means that with a multi-byte write the event can
trigger on any of the addresses to be written to. For example, if a 2-byte
write was attempted to $D000, then the event will trigger if the WRITE_EVENT
bits were set for any combination of the addresses $D000 or D0001. The lowest
(first) address with its 'Write Event' bit set will appear in the DEAR.
$B9
KOKINPROC_EVENT_BP_MEMORY_WRITE
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00B9
DEAR: Lowest memory address with WRITE_EVENT set in MADR
DEDR: Write data
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.25 Event[$BA] KOKINPROC_EVENT_BP_MEMORY_READ
This event triggers when a memory read is attempted and the 'Read Event' bit is
set in the Memory Attribute Data Register (MADR) for any of the accessed memory
addresses. This means that with a multi-byte read the event can trigger on any
of the addresses to be read from. For example, if a 2-byte read was attempted
to $D000, then the event will trigger if the READ_EVENT bits were set for any
combination of the addresses $D000 or D0001. The lowest (first) address with
its 'Read Event' bit set will appear in the DEAR.
$BA
KOKINPROC_EVENT_BP_MEMORY_READ
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00BA
DEAR: Lowest memory address with READ_EVENT set in MADR
DEDR: Undriven Bus Data ($FFFF)
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.26 Event[$BD] KOKINPROC_EVENT_BP_PORT_OUT
This event triggers when a port OUT is attempted and the 'Port Out Event' bit
is set in the Port Attribute Data Register (PADR) for the accessed port.
$BD
KOKINPROC_EVENT_BP_PORT_OUT
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00BD
DEAR: Target Port
DEDR: Write data
DEFR: Current Event Handling Flags (EHFR) for this event
2.3.27 Event[$BE] KOKINPROC_EVENT_BP_PORT_IN
This event triggers when a port IN is attempted and the 'Port In Event' bit is
set in the Port Attribute Data Register (PADR) for the accessed port.
$BE
KOKINPROC_EVENT_BP_PORT_IN
Type BREAKPOINT
Default Action None
Silent Flags Automatically SET when event triggers.
Automatically RESET when current instruction retires.
Device Specific?
Yes
Device Event
Register Updates
DECR: $00BE
DEAR: Target Port
DEDR: Undriven Bus Data ($FFFF)
DEFR: Current Event Handling Flags (EHFR) for this event
2.4 KokinPROC Power-On Self Test Codes
Message Code
Message Mnemonic
Description
$01
NO_HUB_FOUND
The KokinEXTD device requires access to a HUB
device for correct operation. During POST the HUB device
pointer was checked and found to be NULL (0). This POST code
should never occur when the Kokin DLL is used with a released
version of MesaDX. It is only likely to occur in the event
that the Kokin DLL is being used (incorrectly) by a third-party.
$03
REGISTER_ERROR
During POST the KokinPROC device checks that
reading and writing 8 and 16-bit values to and from the
general-purpose registers (e.g., AF, BC, DE, HL) works
correctly. This is necessary since the register implementation
depends on aspects of the C++ language that are
compiler-specific. This POST code should never occur in a
release version of the Kokin DLL. It is only likely to occur
in the event that the Kokin source code was recompiled by a
third-party using a different C++ compiler.
$04
FLAG_ERROR
During POST the KokinPROC device checks that
the symbolic definitions of certain flags in the flags register
(F) are defined correctly. Though symbolic definitions
are used throughout the source code when referring to the flags,
certain instructions require the flags to be in certain bit
positions to ease implementation or improve performance. If
the proper symbolic flag definitions are not preserved then
this POST code will be returned. This POST code should
never occur in a release version of the Kokin DLL. It is only
likely to occur in the event that the Kokin source code was
recompiled by a third-party and the flag definitions were
altered. This POST code is intended to be a final run-time
warning indicating that the changes made to the flag definitions
will affect correct operation.
$05
ISR_ERROR
During POST the KokinPROC device checks that
the symbolic definitions of certain bits in the Interrupt
Status Register (ISR) are defined correctly. Though symbolic
definitions are used throughout the source code when referring
to these bits, certain relationships amongst the bits must be
preserved to simplify the implementation of the ISR. If
the proper bit relationships are not preserved correctly then
this POST code will be returned. This POST code should
never occur in a release version of the Kokin DLL. It is only
likely to occur in the event that the Kokin source code was
recompiled by a third-party and the ISR bit definitions were
altered. This POST code is intended to be a final run-time
warning indicating that the changes made to the ISR definitions
will affect correct operation.
Chapter 3: Hub (HUB) Devices
3.1 KokinMIOH Overview
3.2 KokinMIOH AGAMA Extension Registers
Each AGAMA Device includes a 256-entry 16-bit AGAMA Extension Register (AXR)
file. The AXRs contain device configuration and status information. Both
software and external debuggers can access the AXRs to change device behavior
or to collect device status.
3.2.1 KokinMIOH AXR[$00]: Device ID Register (DIR)
The Device ID Register contains the 4-bit Device ID for the KokinMIOH device.
The Device ID is assigned on Power-On and is used to address the KokinMIOH
during certain types of bus transactions, such as AXR reads and writes.
Table 3.2.1.a: Bit Fields of the Device ID Register (DIR)
DIR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 AGAMA Reserved
Byte 0 AGAMA Reserved
Device ID[3:0]
Access:
READ-ONLY
Bit Fields:
The 4-bit Device ID for the device.
These bits are reserved for future expansion.
3.2.2 KokinMIOH AXR[$01]: Power-On Configuration Register (POCR)
The Power-On Configuration Register contains the initial configuration
settings of the KokinMIOH device. The KokinMIOH device will sample all the
configuration settings and save them in the POCR, but not all the settings are
used. The bit field descriptions below indicate which Power-On Configuration
settings are ignored by the KokinMIOH device.
POCR Bit 7 Bit 6
Bit 5 Bit 4 Bit 3
Bit 2 Bit 1 Bit 0
Byte 1 POST Code
AGAMA Reserved Monitor Mode Suspended
Byte 0 GG Mode Export R